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LC75833JE 数据表(PDF) 6 Page - Sanyo Semicon Device |
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LC75833JE 数据表(HTML) 6 Page - Sanyo Semicon Device |
6 / 19 page Pin Functions Note: The LC75833JE does not have the S12, S23, S24, S35 output pins. No. 5580-6/19 LC75833E, 75833W, 75833JE CE: Chip enable CL: Synchronization clock DI: Transfer data H — S1/P1 to S8/P8 S9 to S35 Pin 1 to 8 9 to 35 LC75833E, 75833W LC75833JE 1 to 8 9 to 31 — O Open Segment outputs for displaying the display data transferred by serial data input. The pins S1/P1 to S8/P8 can be used as general-purpose output ports when so set up by the control data. COM1 COM2 COM3 36 37 38 32 33 34 — O Open Common driver outputs. The frame frequency fO is given by: fO = (fOSC/384) Hz. OSC 44 40 CE CL DI 46 47 48 42 43 44 Serial data transfer inputs. These pins are connected to the control microprocessor. — I/O VDD I GND Oscillator connection An oscillator circuit is formed by connecting an external resistor and capacitor to this pin. VLCD1 41 37 — I Open Used to apply the LCD drive 2/3-bias voltage externally. This pin must be connected to VLCD2 when 1/2-bias drive is used. VLCD2 42 38 — I Open Used to apply the LCD drive 1/3-bias voltage externally. This pin must be connected to VLCD1 when 1/2-bias drive is used. VDD 39 35 — — — Logic block power supply. Provide a voltage in the range 2.7 to 6.0 V. VLCD 40 36 — — — LCD driver block power supply. Provide a voltage in the range 2.7 to 6.0 V. VSS 43 39 — — — Ground pin. Connect to ground. INH 45 41 L I GND Display off control input •INH = low (VSS): Off S1/P1 to S8/P8 = Low (These pins are forcibly set to the segment output port function and fixed at the VSS level.) S9 to S35 = Low (VSS), COM1 to COM3 = Low (VSS) •INH = high (VDD): On Note that serial data transfers can be performed when the display is forced off by this pin. Active I/O Handling when unused Functions Pin No. |
类似零件编号 - LC75833JE |
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类似说明 - LC75833JE |
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