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LC75804 数据表(PDF) 7 Page - Sanyo Semicon Device |
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LC75804 数据表(HTML) 7 Page - Sanyo Semicon Device |
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7 / 37 page  No. 6266-7/37 LC75804E, LC75804W Pin Pin No. Function Active I/O Handling LC75804E LC75804W when unused — q q OPEN COM1 COM2 — q q OPEN COM3 COM4/S74 KS1/S75 80 78 KS2/S76 81 79 — O OPEN KS3 to KS6 82 to 85 80 to 83 KI1 to KI5 86 to 90 84 to 88 H I GND OSC 97 95 — I/O VDD CE 100 98 H I CL 1 99 I GND DI 2 100 — I DO 99 97 — O OPEN RES 98 96 L I VDD TEST 96 94 This pin must be connected to ground. — I — VLCD1 93 91 — I OPEN VLCD2 94 92 — I OPEN VDD 91 89 — — — VLCD 92 90 — — — VSS 95 93 Power supply connection. Connect to ground. — — — Pin Functions Segment outputs for displaying the display data transferred by serial data input. The S1/P1 to S8/P8 pins can be used as general-purpose output ports under serial data control. Common driver outputs The frame frequency fo is given by : fo = (fOSC/384)Hz. The COM4/S74 pin can be used as a segment output in 1/3 duty. Key scan outputs Although normal key scan timing lines require diodes to be inserted in the timing lines to prevent shorts, since these outputs are unbalanced CMOS transistor outputs, these outputs will not be damaged by shorting when these outputs are used to form a key matrix. The KS1/S75 and KS2/S76 pins can be used as segment outputs when so specified by the control data. Key scan inputs These pins have built-in pull-down resistors. Oscillator connection An oscillator circuit is formed by connecting an external resistor and capacitor at this pin. Serial data interface connections to the controller. Note that DO, being an open-drain output, requires a pull-up resistor. CE :Chip enable CL :Synchronization clock DI :Transfer data DO :Output data v Reset signal input RES = low.....Display off Key scan disabled All key data is reset to low RES = high....Display on Key scan enabled However, serial data can be transferred when RES is low. Used for applying the LCD drive 2/3 bias voltage externally. Must be connected to VLCD2 when a 1/2 bias drive scheme is used. Used for applying the LCD drive 1/3 bias voltage externally. Must be connected to VLCD1 when a 1/2 bias drive scheme is used. Logic block power supply connection. Provide a voltage of between 4.5 and 6.0V. LCD driver block power supply connection. Provide a voltage of between VDD – 0.5 and 6.0V. S1/P1 to S8/P8 S9 to S73 3 to 10 11 to 75 1 to 8 9 to 73 79 78 77 76 77 76 75 74 |
类似零件编号 - LC75804 |
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类似说明 - LC75804 |
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