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ISL29028 数据表(PDF) 5 Page - Intersil Corporation |
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ISL29028 数据表(HTML) 5 Page - Intersil Corporation |
5 / 15 page 5 FN6780.1 March 2, 2010 tBUF Bus Free Time Between a STOP and START Condition 1300 ns Cb Capacitive Load for Each Bus Line 400 pF Rpull-up SDA and SCL system bus pull-up resistor Maximum is determined by tR and tF 1kΩ tVD;DAT Data Valid Time 0.9 µs tVD:ACK Data Valid Acknowledge Time 0.9 µs VnL Noise Margin at the LOW Level 0.1VDD V VnH Noise Margin at the HIGH Level 0.2VDD V NOTES: 9. All parameters in I2C Electrical Specifications table are guaranteed by design and simulation. 10. Cb is the capacitance of the bus in pF. I2C Electrical Specifications For SCL and SDA unless otherwise noted, VDD = 3V, TA = +25°C, REXT = 499kΩ 1% tolerance (Note 9). (Continued) PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT FIGURE 1. I2C TIMING DIAGRAM ISL29028 |
类似零件编号 - ISL29028 |
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类似说明 - ISL29028 |
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