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LM22677QTJ-ADJ 数据表(PDF) 7 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 LM22677QTJ-ADJ
功能描述  5A SIMPLE SWITCHER짰, Step-Down Voltage Regulator with Synchronization or Adjustable Switching Frequency
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

LM22677QTJ-ADJ 数据表(HTML) 7 Page - National Semiconductor (TI)

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Detailed Operating Description
The LM22677 switching regulator features all of the functions
necessary to implement an efficient high voltage buck regu-
lator using a minimum of external components. This easy to
use regulator integrates a 42V N-Channel switch with an out-
put current capability of 5A. The regulator control method is
based on voltage mode control with input voltage feed for-
ward. The loop compensation is integrated into the LM22677
so that no external compensation components need to be se-
lected or utilized. Voltage mode control offers short minimum
on-times allowing short duty-cycles necessary in high input
voltage applications. The operating frequency is fixed at
500kHz to allow for small external components while avoiding
excessive switching losses. The switching frequency can be
adjusted with an external resistor from 200 kHz to 1 MHz or
it can be synchronized to an external clock up to 1 MHz. The
output voltage can be set as low as 1.285V with the -ADJ
device. Fault protection features include current limiting, ther-
mal shutdown and remote shutdown capability. The device is
available in the TO-263 THIN package featuring an exposed
pad to aid thermal dissipation.
The functional block diagram with typical application of the
LM22677 are shown in Figure 1.
The internal compensation of the -ADJ option of the LM22677
is optimized for output voltages up to 5V. If an output voltage
of 5V or higher is needed, the -5.0 fixed output voltage option
with an additional external resistive feedback voltage divider
may also be used.
Precision Enable
The precision enable pin (EN) can be used to shut down the
power supply. Connecting this pin to ground or to a voltage
less than typical 1.6V will completely turn off the regulator.
The current drain from the input supply when off is typically
25 µA with 12V input voltage. The power consumed during
this off state is mostly defined by an internal 2 M
Ω resistor to
VIN. The enable pin has an internal pull-up current source of
approximately 6 µA. When driving the enable pin, the high
voltage level for the on condition should not exceed the 6V
absolute maximum limit. When enable control is not required,
the EN pin should be left floating. The precision feature en-
ables simple sequencing of multiple power supplies with a
resistor divider from another power supply.
The EN pin can also be used as an external UVLO to disable
the part when input voltage falls below a lower boundary of
operation. This is often used to prevent excessive battery dis-
charge. It can also be used to prevent early turn-on as Vin is
rising which can cause undesirable on-off toggling if Vin
droops below 4.5V during startup. Using EN as en external
UVLO is also recommended to prevent abnormal device op-
eration in applications where the input voltage falls below the
minimum operating voltage of 4.5V, during power down for
example.
Maximum Duty-Cycle / Dropout
Voltage
The typical maximum duty-cycle is 90% at 500 kHz switching
frequency. This corresponds to a typical minimum off-time of
200 ns. When operating at switching frequencies higher than
500 kHz, the 200 ns minimum off-time results in a lower max-
imum duty-cycle limit than 90%. This forced off-time is impor-
tant to provide enough time for the Cboot capacitor to charge
during each cycle.
The lowest input voltage required to maintain operation is:
Where V
D is the forward voltage drop across the re-circulating
Schottky diode and V
Q is the voltage drop across the internal
power N-FET of the LM22677. The R
DS(ON) of the FET is
specified in the electrical characteristics section of this
datasheet to calculate V
Q according to the FET current. F is
the switching frequency.
Minimum Duty-Cycle
Besides a minimum off-time, there is also a minimum on-time
which will take effect when the output voltage is adjusted very
low and the input voltage is very high. Should the operation
require an on-time shorter than minimum, individual switching
pulses will be skipped.
Pulse skipping is a normal mode of operation which appears
as a decrease in switching frequency. It has no effect on op-
eration or regulation except for an increase in output ripple
voltage. The pulse skipping function is required to maintain
proper regulation and overcurrent protection under the full
range of operating conditions.
The specified typical minimum on time of 100 ns is based on
the blanking time during current limit operation. During normal
operation, the minimum on-time will also include the effect of
propagation delay. Assume approximately 150 ns as a typical
operating minimum on time.
where D is the duty-cycle.
Current Limit
When the power switch turns on, the slight capacitance load-
ing of the Schottky diode, D1, causes a leading-edge current
spike with an extended ringing period. This spike can cause
the current limit comparator to trip prematurely. A leading
edge blanking time (T
BLK) of 100 ns (typical) is used to avoid
sampling the spike.
When the switch current reaches the current limit threshold
the switch is immediately turned off. If T
ON is larger than the
minimum (100 ns typical) the switcher will hold the output
current flat at the set current limit value. But if T
ON is at or
decreases to the minimum T
ON (100 ns typical) the switching
frequency decreases to 1/5 the typical frequency. This effec-
tively causes the output current to fold back to a lower and
safe value. When the current limit condition is removed the
switching frequency is restored to nominal. This 5X frequency
fold back will result in a lower duty cycle pulse of the power
switch to minimize the overall fault condition power dissipa-
tion.
7
www.national.com


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