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TS87C54X2-LCC 数据表(PDF) 10 Page - ATMEL Corporation |
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TS87C54X2-LCC 数据表(HTML) 10 Page - ATMEL Corporation |
10 / 62 page 10 4431E–8051–04/06 AT/TS8xC54/8X2 Table 6-1. CKCON Register CKCON - Clock Control Register (8Fh) Reset Value = XXXX XXX0b Not bit addressable F or further details on the X2 fe ature, please refer to ANM 072 ava ilable on the web (http://www.atmel.com) 76 543 210 --- --- - X2 Bit Number Bit Mnemonic Description 7- Reserved The value read from this bit is indeterminate. Do not set this bit. 6- Reserved The value read from this bit is indeterminate. Do not set this bit. 5- Reserved The value read from this bit is indeterminate. Do not set this bit. 4- Reserved The value read from this bit is indeterminate. Do not set this bit. 3- Reserved The value read from this bit is indeterminate. Do not set this bit. 2- Reserved The value read from this bit is indeterminate. Do not set this bit. 1- Reserved The value read from this bit is indeterminate. Do not set this bit. 0X2 CPU and peripheral clock bit Clear to select 12 clock periods per machine cycle (STD mode, FOSC=FXTAL/2). Set to select 6 clock periods per machine cycle (X2 mode, FOSC=FXTAL). |
类似零件编号 - TS87C54X2-LCC |
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类似说明 - TS87C54X2-LCC |
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