Operation Description

GENERAL

The LM26001B is a current mode PWM buck regulator. At the

beginning of each clock cycle, the internal high-side switch

turns on, allowing current to ramp up in the inductor. The in-

ductor current is internally monitored during each switching

cycle. A control signal derived from the inductor current is

compared to the voltage control signal at the COMP pin, de-

rived from the feedback voltage. When the inductor current

reaches the threshold, the high-side switch is turned off and

inductor current ramps down. While the switch is off, inductor

current is supplied through the catch diode. This cycle repeats

at the next clock cycle. In this way, duty cycle and output volt-

age are controlled by regulating inductor current. Current

mode control provides superior line and load regulation. Other

benefits include cycle by cycle current limiting and a simplified

compensation scheme. Typical PWM waveforms are shown

in Figure 1.

30001919

FIGURE 1. PWM Waveforms

1A Load, Vin = 12V

SLEEP MODE

In light load conditions, the LM26001B automatically switches

into sleep mode for improved efficiency. As loading decreas-

es, the voltage at FB increases and the COMP voltage de-

creases. When the COMP voltage reaches the 0.6V (typical)

clamp threshold, and the FB voltage rises 1% above nominal,

sleep mode is enabled and switching stops. The regulator re-

mains in sleep mode until the FB voltage falls to the reset

threshold, at which point switching resumes. This 1% FB win-

dow limits the corresponding output ripple to approximately

1% of nominal output voltage. The sleep cycle will repeat until

load current is increased. Figure 2 shows typical switching

and output voltage waveforms in sleep mode.

30001920

FIGURE 2. Sleep Mode Waveforms

25mA Load, Vin = 12V

In sleep mode, quiescent current is reduced to less than 40

µA when not switching. The DC sleep mode threshold can be

calculated according to the equation below:

Where Imin=Ilim/16 (2.5A/16 typically) and D=duty cycle, de-

fined as (Vout+Vdiode)/Vin.

When load current increases above this limit, the LM26001B

is forced back into PWM operation. The sleep mode threshold

varies with frequency, inductance, and duty cycle as shown

in Figure 3.

30001922

FIGURE 3. Sleep Mode Threshold vs Vin

Vout = 3.3V

FPWM

Pulling the FPWM pin high disables sleep mode and forces

the LM26001B to always operate in PWM mode. Light load

efficiency is reduced in PWM mode, but switching frequency

remains stable. The FPWM pin can be connected to the VDD

pin to pull it high. In FPWM mode, under light load conditions,

the regulator operates in discontinuous conduction mode

(DCM) . In discontinuous conduction mode, current through

the inductor starts at zero and ramps up to its peak, then

9

www.national.com