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SN74AVCA406DGGRG4 数据表(PDF) 11 Page - Texas Instruments |
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SN74AVCA406DGGRG4 数据表(HTML) 11 Page - Texas Instruments |
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11 / 45 page  www.ti.com SN74AVCA406 MMC, SD CARD, Memory Stick, SmartMedia, AND xD-Picture Card ±15-kV ESD-PROTECTED VOLTAGE-TRANSLATION TRANSCEIVER SCES615H – OCTOBER 2004 – REVISED JANUARY 2007 Table 5. SDIO Card (Slot 0) and SD Card (Slot 1) (continued) SIGNAL NAME PIN PIN PIN OR PIN FUNCTION NO. NAME TYPE (CONNECTION) B3 1A DAT0.h Data bit 1 connected to host. Referenced to VCCA. I/O C3 Depopulated ball D3 56DIR (tie-high) Direction control for 5A/5B and 6A/6B. Not used in this mode. Tie to VCCA. Input E3 GND GND Ground F3 12A DNU Output pin not used in this mode. Do not use. Leave unconnected. Output G3 11A (tie-low) Input pin not used in this mode. Tie to GND Input A4 2DIR DAT1-dir.h Direction control for 2A/2B connected to host Input B4 1DIR DAT0-dir.h Direction control for 1A/1B connected to host Input C4 3DIR DAT2-dir.h Direction control for 3A/3B connected to host Input D4 GND GND Ground Card select from host. Active low. When CS0 = high, 1A, 2A, 3A, 4A, 1B, 2B, 3B, 4B, and E4 CS0 CS0.h Input 9B1 are placed in Hi Z, and 10B1 is low. F4 13A (tie-low) Input pin not used in this mode. Tie to GND. Input Card select from host. Active low. When CS1 = high, 5A, 6A, 7A, 8A, 5B, 6B, 7B, 8B, 7B, G4 CS1 CS1.h Input and 9B2 are placed in Hi Z, and 10B2 is low. A5 MODE1 (tie-low) Input MODE1, MODE0 determine mode of operation (see Table 1). Tie to GND in this mode. B5 MODE0 (tie-low) Input C5 GND GND Ground D5 4B DAT3.0 Data bit 4 connected to card in slot 0. Referenced to VCCB0. I/O E5 GND GND Ground F5 7B DAT2.1 Data bit 3 connected to card in slot 1. Referenced to VCCB1. I/O G5 8B DAT3.1 Data bit 4 connected to card in slot 1. Referenced to VCCB1. I/O A6 10B1 CLK.0 Clock signal connected to card in slot 0 Output B6 9B1 CMD.0 Command signal connected to card in slot 0 Output C6 2B DAT1.0 Data bit 2 connected to card in slot 0. Referenced to VCCB0. I/O D6 11B DNU Output pin not used in this mode. Leave unconnected. Output E6 10B2 CLK.1 Clock signal connected to card in slot 1 Output F6 5B DAT0.1 Data bit 1 connected to card in slot 1. Referenced to VCCB1. I/O G6 6B DAT1.1 Data bit 2 connected to card in slot 1. Referenced to VCCB1. I/O A7 VCCB0 VCCB0 B-port supply voltage. VCCB0 powers 1B, 2B, 3B, 4B, 9B1, and 10B1. Power B7 1B DAT0.0 Data bit 1 connected to card in slot 0. Referenced to VCCB0. I/O C7 3B DAT2.0 Data bit 3 connected to card in slot 0. Referenced to VCCB0. I/O D7 12B (tie-low) Input pin not used in this mode. Tie to GND. Input E7 9B2 CMD.1 Command signal connected to card in slot 1 I/O Open-drain interrupt output for dual SDIO cards configuration. DAT1 is the input for F7 14B IRQ.h Output interrupt. G7 VCCB1 VCCB1 B-port supply voltage. VCCB1 powers 5B, 6B, 7B, 8B, 9B2, 10B2, 11B, 12B, and 14B. Power 11 Submit Documentation Feedback |
类似零件编号 - SN74AVCA406DGGRG4 |
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类似说明 - SN74AVCA406DGGRG4 |
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