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ADT7421ARZ-REEL 数据表(PDF) 11 Page - ON Semiconductor |
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ADT7421ARZ-REEL 数据表(HTML) 11 Page - ON Semiconductor |
11 / 20 page ADT7421 http://onsemi.com 11 Table 8. List of Registers Read Address (Hex) Write Address (Hex) Name Power−On Default Binary Hex Decimal Not Applicable Not Applicable Address Pointer Undefined 00 Not Applicable Local Temperature Value 0000 0000 0x00 01 Not Applicable External Temperature Value High Byte 0000 0000 0x00 02 Not Applicable Status Undefined 03 09 Configuration 0000 1000 0x08 04 0A Conversion Rate 0000 1000 0x06 05 0B Local Temperature High Limit 0101 0101 0x55 85°C 06 0C Local Temperature Low Limit 0000 0000 0x00 0°C 07 0D External Temperature High Limit High Byte 0101 0101 0x55 85°C 08 0E External Temperature Low Limit High Byte 0000 0000 0x00 0°C Not Applicable 0F One−Shot 10 Not Applicable External Temperature Value Low Byte 0000 0000 0x00 11 11 External Temperature Offset High Byte 0000 0000 0x00 12 12 External Temperature Offset Low Byte 0000 0000 0x00 13 13 External Temperature High Limit Low Byte 0000 0000 0x00 14 14 External Temperature Low Limit Low Byte 0000 0000 0x00 19 19 External THERM Limit 0101 0101 0x55 85°C 20 20 Local THERM Limit 0101 0101 0x55 85°C 21 21 THERM Hysteresis 0000 1010 0x0A 10°C 22 22 Consecutive ALERT 0000 0001 0x01 3D Not Applicable Device ID 0010 0001 0x21 FE Not Applicable Manufacturer ID 0100 0001 0x41 FF Not Applicable Die Revision Code Serial Bus Interface Control of the ADT7421 is carried out via the serial bus. The ADT7421 is connected to this bus as a slave device, under the control of a master device. The ADT7421 has an SMBus timeout feature. When this is enabled, the SMBus times out after typically 25 ms of no activity. However, this feature is not enabled by default. Bits 6 and 7 of the consecutive alert register (Address = 0x22) should be set to enable it. Addressing the Device In general, every SMBus device has a 7−bit device address, except for some devices that have extended 10−bit addresses. When the master device sends a device address over the bus, the slave device with that address responds. The ADT7421is available with one device address, 0x4C (1001 100b). The ADT7421−2 is also available. The ADT7421−2 has an SMBus address of 0x4D (1001 101b). This is to allow two ADT7421 devices on the same bus, or if the default address conflicts with an existing device on the SMBus. The serial bus protocol operates as follows: The master initiates a data transfer by establishing a start condition, defined as a high−to−low transition on SDATA, the serial data line, while SCLK, the serial clock line, remains high. This indicates that an address/data stream follows. All slave peripherals connected to the serial bus respond to the start condition and shift in the next eight bits, consisting of a 7−bit address (MSB first) plus an R/W bit, which determines the direction of the data transfer, that is, whether data is written to, or read from, the slave device. The peripheral whose address corresponds to the transmitted address responds by pulling the data line low during the low period before the ninth clock pulse, known as the acknowledge bit. All other devices on the bus remain idle while the selected device waits for data to be read from or written to it. If the R/W bit is a 0, the master writes to the slave device. If the R/W bit is a 1, the master reads from the slave device. 1. Data is sent over the serial bus in a sequence of nine clock pulses, eight bits of data followed by an acknowledge bit from the slave device. Transitions on the data line must occur during the low period of the clock signal and remain stable during the high period, since a low−to−high transition when the clock is high can be interpreted as a stop signal. The number of data bytes that can be transmitted over the serial bus in a single read or |
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