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LPC2290 数据表(PDF) 15 Page - NXP Semiconductors |
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LPC2290 数据表(HTML) 15 Page - NXP Semiconductors |
15 / 41 page LPC2290_3 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 03 — 16 November 2006 15 of 41 NXP Semiconductors LPC2290 16/32-bit ARM microcontroller with external memory interface 6.4 Interrupt controller The Vectored Interrupt Controller (VIC) accepts all of the interrupt request inputs and categorizes them as Fast Interrupt Request (FIQ), vectored Interrupt Request (IRQ), and non-vectored IRQ as defined by programmable settings. The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted. FIQ has the highest priority. If more than one request is assigned to FIQ, the VIC combines the requests to produce the FIQ signal to the ARM processor. The fastest possible FIQ latency is achieved when only one request is classified as FIQ, because then the FIQ service routine can simply start dealing with that device. But if more than one request is assigned to the FIQ class, the FIQ service routine can read a word from the VIC that identifies which FIQ source(s) is (are) requesting an interrupt. Fig 3. LPC2290 and LPC2290/01 memory map AHB PERIPHERALS VPB PERIPHERALS RESERVED ADDRESS SPACE RESERVED ADDRESS SPACE 16 KBYTE ON-CHIP STATIC RAM 64 KBYTE ON-CHIP STATIC RAM (/01 ONLY) RESERVED ADDRESS SPACE 0xFFFF FFFF 0xF000 0000 0xEFFF FFFF 0xE000 0000 0xDFFF FFFF 0x4000 4000 0x4000 3FFF 0x4001 0000 0x4000 FFFF 0x4000 0000 0x3FFF FFFF 4.0 GB 3.75 GB 3.5 GB 3.0 GB 2.0 GB 1.0 GB 0.0 GB 0x0000 0000 002aaa798 0x8400 0000 0x7FFF FFFF EXTERNAL MEMORY BANK3 0x83FF FFFF 0x8300 0000 EXTERNAL MEMORY BANK2 0x82FF FFFF 0x8200 0000 EXTERNAL MEMORY BANK1 0x81FF FFFF 0x8100 0000 EXTERNAL MEMORY BANK0 0x80FF FFFF 0x8000 0000 BOOT BLOCK (RE-MAPPED FROM ON-CHIP ROM MEMORY 0x7FFF E000 0x7FFF DFFF |
类似零件编号 - LPC2290 |
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类似说明 - LPC2290 |
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