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SN74LVC2G04DBVRE4 数据表(PDF) 2 Page - Texas Instruments |
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SN74LVC2G04DBVRE4 数据表(HTML) 2 Page - Texas Instruments |
2 / 15 page www.ti.com 1A 1Y 1 6 2A 2Y 3 4 Absolute Maximum Ratings (1) SN74LVC2G04 DUAL INVERTER GATE SCES195L – APRIL 1999 – REVISED JANUARY 2007 FUNCTION TABLE (EACH INVERTER) INPUT OUTPUT A Y H L L H LOGIC DIAGRAM (POSITIVE LOGIC) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 6.5 V VI Input voltage range(2) –0.5 6.5 V VO Voltage range applied to any output in the high-impedance or power-off state(2) –0.5 6.5 V VO Voltage range applied to any output in the high or low state(2)(3) –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA Continuous current through VCC or GND ±100 mA DBV package 165 DCK package 259 θ JA Package thermal impedance(4) °C/W DRL package 142 YZP package 123 Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. (3) The value of VCC is provided in the recommended operating conditions table. (4) The package thermal impedance is calculated in accordance with JESD 51-7. 2 Submit Documentation Feedback |
类似零件编号 - SN74LVC2G04DBVRE4 |
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类似说明 - SN74LVC2G04DBVRE4 |
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