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PSMN5R0-30YL 数据表(PDF) 1 Page - NXP Semiconductors

部件名 PSMN5R0-30YL
功能描述  N-channel TrenchMOS logic level FET
Download  14 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

PSMN5R0-30YL 数据表(HTML) 1 Page - NXP Semiconductors

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PSMN5R0-30YL
N-channel TrenchMOS logic level FET
Rev. 03 — 4 January 2010
Product data sheet
1.
Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
industrial and communications applications.
1.2 Features and benefits
High efficiency due to low switching
and conduction losses
Suitable for logic level gate drive
sources
1.3 Applications
Class-D amplifiers
DC-to-DC converters
Motor control
Server power supplies
1.4 Quick reference data
Table 1.
Quick reference
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
-
30
V
ID
drain current
Tmb =25°C; VGS =10V;
see Figure 1
--91
A
Ptot
total power
dissipation
Tmb = 25 °C; see Figure 2
--61
W
Dynamic characteristics
QGD
gate-drain charge
VGS = 4.5 V; ID =10A;
VDS = 12 V; see Figure 14 and 15
-3.8
-nC
QG(tot)
total gate charge
VGS = 4.5 V; ID =10A;
VDS = 12 V; see Figure 14
-
14.1
-
nC
Static characteristics
RDSon
drain-source
on-state resistance
VGS =10V; ID =15 A; Tj = 25 °C
-
3.63
5
m


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