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PSMN5R0-30YL 数据表(PDF) 6 Page - NXP Semiconductors

部件名 PSMN5R0-30YL
功能描述  N-channel TrenchMOS logic level FET
Download  14 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

PSMN5R0-30YL 数据表(HTML) 6 Page - NXP Semiconductors

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PSMN5R0-30YL_3
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 4 January 2010
6 of 14
NXP Semiconductors
PSMN5R0-30YL
N-channel TrenchMOS logic level FET
[1]
Tested to JEDEC standards where applicable.
Source-drain diode
VSD
source-drain voltage
IS =25A; VGS =0V; Tj = 25 °C; see Figure 17
-
0.84
1.2
V
trr
reverse recovery time
IS =20A; dIS/dt = -100 A/µs; VGS =0V;
VDS =20V
-30
-
ns
Qr
recovered charge
-
21
-
nC
Table 6.
Characteristics …continued
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Fig 5.
Output characteristics: drain current as a
function of drain-source voltage; typical values
Fig 6.
Drain-source on-state resistance as a function
of drain current; typical values
Fig 7.
Transfer characteristics: drain current as a
function of gate-source voltage; typical values
Fig 8.
Forward transconductance as a function of
drain current; typical values
003aac548
0
20
40
60
80
100
120
024
6
8
10
VDS (V)
ID
(A)
2.2
2.4
2.6
2.8
3
VGS (V) = 3.2
4.5
10
003aac550
0
2
4
6
8
10
020
40
60
ID (A)
RDSon
(m
Ω)
VGS (V) = 3.2 V
4.5
10
003aac552
0
20
40
60
80
012
34
VGS (V)
ID
(A)
Tj = 150
°C
25
°C
003aac555
30
40
50
60
70
80
010
20
30
40
ID (A)
gfs
(S)


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