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CS8415A-CSR 数据表(PDF) 5 Page - Cirrus Logic |
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CS8415A-CSR 数据表(HTML) 5 Page - Cirrus Logic |
5 / 46 page DS470F4 5 CS8415A LIST OF FIGURES Figure 1. Audio Port Master Mode Timing ................................................................................................... 8 Figure 2. Audio Port Slave Mode and Data Input Timing............................................................................. 8 Figure 3. SPI Mode Timing .......................................................................................................................... 9 Figure 4. I²C Mode Timing ......................................................................................................................... 10 Figure 5. Recommended Connection Diagram for Software Mode ........................................................... 11 Figure 6. Serial Audio Output Example Formats........................................................................................ 14 Figure 7. AES3 ReceiverTiming for C & U Pin Output Data ...................................................................... 17 Figure 8. Control Port Timing in SPI Mode ................................................................................................ 18 Figure 9. Control Port Timing in I²C Mode ................................................................................................. 19 Figure 10. Hardware Mode ........................................................................................................................ 31 Figure 11. Professional Input Circuit .......................................................................................................... 36 Figure 12. Transformerless Professional Input Circuit ............................................................................... 36 Figure 13. Consumer Input Circuit ............................................................................................................. 36 Figure 14. S/PDIF MUX Input Circuit ......................................................................................................... 36 Figure 15. TTL/CMOS Input Circuit............................................................................................................ 36 Figure 16. Channel Status Data Buffer Structure....................................................................................... 37 Figure 17. Flowchart for Reading the E Buffer........................................................................................... 38 Figure 18. PLL Block Diagram ................................................................................................................... 40 Figure 19. Recommended Layout Example............................................................................................... 41 Figure 20. Jitter Tolerance Template ......................................................................................................... 43 Figure 21. Revision A................................................................................................................................. 44 Figure 22. Revision A1............................................................................................................................... 44 Figure 23. Revision A2 using A1 Values.................................................................................................... 44 Figure 24. Revision A2 using A2* Values .................................................................................................. 44 LIST OF TABLES Table 1. Control Register Map Summary................................................................................................... 20 Table 2. Equivalent Software Mode Bit Definitions .................................................................................... 31 Table 3. Hardware Mode Start-Up Options................................................................................................ 31 Table 4. Second Line Part Marking............................................................................................................ 42 Table 5. Fs = 8 to 96 kHz ........................................................................................................................... 42 Table 6. Fs = 32 to 96 kHz ......................................................................................................................... 42 Table 7. Revision History ........................................................................................................................... 45 |
类似零件编号 - CS8415A-CSR |
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类似说明 - CS8415A-CSR |
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