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74ALVC373D 数据表(PDF) 10 Page - NXP Semiconductors |
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74ALVC373D 数据表(HTML) 10 Page - NXP Semiconductors |
10 / 17 page 74ALVC373_2 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 02 — 18 October 2007 10 of 17 NXP Semiconductors 74ALVC373 Octal D-type transparent latch; 3-state Measurement points are given in Table 8. VOL and VOH are the typical output voltage levels that occur with the output load. Fig 10. Enable and disable times mna395 tPLZ tPHZ outputs disabled outputs enabled VY VX outputs enabled Qn output LOW-to-OFF OFF-to-LOW Qn output HIGH-to-OFF OFF-to-HIGH OE input VI VOL VOH VCC VM GND GND tPZL tPZH VM VM Measurement points are given in Table 8. The shaded areas indicate when the input is permitted to change for predicable output performance. Fig 11. The data set-up and hold times for Dn input to LE input mna887 th tsu th tsu VM VM VI GND VI GND LE input Dn input |
类似零件编号 - 74ALVC373D |
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类似说明 - 74ALVC373D |
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