74ABT841_3

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Product data sheet

Rev. 03 — 25 March 2010

4 of 15

NXP Semiconductors

74ABT841

10-bit bus interface latch; 3-state

6.

Functional description

[1]

H = HIGH voltage level;

h = HIGH voltage level one set-up time prior to the LOW-to-HIGH LE transition;

L = LOW voltage level;

l = LOW voltage level one set-up time prior to the LOW-to-HIGH LE transition;

↓ = HIGH-to-LOW clock transition;

NC = no change;

X = don’t care;

Z = high-impedance OFF-state.

7.

Limiting values

[1]

The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2]

The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction

temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150

°C.

Table 3.

Function table[1]

Input

Output

Operating mode

OE

LE

nD

Q0 to Q9

L

H

L

L

transparent

L

H

H

H

L

↓

l

L

latched

L

↓

h

H

H

X

X

Z

high-impedance

L

L

X

NC

hold

Table 4.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Max

Unit

supply voltage

−0.5

+7.0

V

input voltage

[1]

−1.2

+7.0

V

output voltage

output in OFF-state or HIGH-state

[1]

−0.5

+5.5

V

input clamping current

−18

-

mA

output clamping current

−50

-

mA

output current

output in LOW-state

-

128

mA

junction temperature

[2] -

150

°C

storage temperature

−65

+150

°C