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SS7646 数据表(PDF) 4 Page - Silicon Standard Corp. |
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SS7646 数据表(HTML) 4 Page - Silicon Standard Corp. |
4 / 13 page www.SiliconStandard.com 4 of 5 SS7646 8/21/2004 Rev.2.01 Timing Specifications: (TA = -40 °C to +85°C, VDD≧+2.7V, CLOAD=50pF. Typical values are at TA = +25°C, unless otherwise noted.) SYMBOL DESCRIPTION MIN TYP MAX UNITS TACQ ADC acquisition time 500 ns TCON ADC conversion time 6.5 µs TCSF /CS falling to first DCLK rising 100 ns TCSR /CS rising to DCLK ignored 0 ns TDOF /CS falling to DOUT enable 200 ns TDOR /CS rising to DOUT disable 200 ns TBSF /CS falling to BUSY enable 200 ns TBSR /CS rising to BUSY disable 200 ns TCKH DCLK High Period 200 ns TCKL DCLK LOW Period 200 ns TDIS DIN valid before DCLK rising 100 ns TDIH DIN hold time after DCLK going high 15 ns TDO DCLK falling to DOUT valid 200 ns TBO DCLK falling to BUSY rising 200 ns Timing Diagram: /CS DCLK X/Y SWITCH DIN BUSY DOUT 18 1 18 ON Acquire Tri-State Tri-State Tri-State Tri-State (MSB) (LSB) 11 0 TACQ TCON TCSF TCSR TDOF TDOR TBSR TBSF TCKH TCK/L DIS T TDIH TDO BO T |
类似零件编号 - SS7646 |
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类似说明 - SS7646 |
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