ADP151ACBZ-3.0-R7 datasheet(4/24 Pages) AD

部件名	ADP151ACBZ-3.0-R7

功能描述	Ultralow Noise,200 mA, CMOS Linear Regulator

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制造商	AD [Analog Devices]

网页	http://www.analog.com

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ADP151

Rev. 0 | Page 4 of 24

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

START-UP TIME3

TSTART-UP

VOUT = 3.3 V

180

µs

CURRENT LIMIT THRESHOLD4

ILIMIT

TJ = −40°C to +125°C

220

300

400

mA

UNDERVOLTAGE LOCKOUT

TJ = −40°C to +125°C

Input Voltage Rising

UVLORISE

1.96

V

Input Voltage Falling

UVLOFALL

1.28

V

Hysteresis

UVLOHYS

120

mV

THERMAL SHUTDOWN

Thermal Shutdown Threshold

TSSD

TJ rising

150

°C

Thermal Shutdown Hysteresis

TSSD-HYS

15

°C

EN INPUT

EN Input Logic High

VIH

2.2 V ≤ VIN ≤ 5.5 V

1.2

V

EN Input Logic Low

VIL

2.2 V ≤ VIN ≤ 5.5 V

0.4

V

EN Input Pull-Down Resistance

REN

VIN = VEN = 5.5 V

2.6

MΩ

OUTPUT NOISE

OUTNOISE

10 Hz to 100 kHz, VIN = 5 V, VOUT = 3.3 V

9

µV rms

10 Hz to 100 kHz, VIN = 5 V, VOUT = 2.5 V

9

µV rms

10 Hz to 100 kHz, VIN = 5 V, VOUT = 1.1 V

9

µV rms

POWER SUPPLY REJECTION RATIO

PSRR

VIN = VOUT + 0.5 V

10 kHz, VIN = 3.8 V, VOUT = 3.3 V, IOUT = 10 mA

70

dB

100 kHz, VIN = 3.8 V, VOUT = 3.3 V, IOUT = 10 mA

55

dB

VIN = VOUT + 1 V

10 kHz, VIN = 4.3 V, VOUT = 3.3 V, IOUT = 10 mA

70

dB

100 kHz, VIN = 4.3 V, VOUT = 3.3 V, IOUT = 10 mA

55

dB

10 kHz, VIN = 2.2 V, VOUT = 1.1 V, IOUT = 10 mA

70

dB

100 kHz, VIN = 2.2 V, VOUT = 1.1 V, IOUT = 10 mA

55

dB

1

Based on an end-point calculation using 0.1 mA and 200 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA.

2

Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output

voltages above 2.2 V.

3

Start-up time is defined as the time between the rising edge of EN and VOUT being at 90% of its nominal value.

4

Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V

output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V (that is, 2.7 V).

INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

Minimum Input and Output

Capacitance1

CMIN

TA = −40°C to +125°C

0.7

µF

Capacitor ESR

RESR

TA = −40°C to +125°C

0.001

0.2

Ω

1

The minimum input and output capacitance should be greater than 0.7 μF over the full range of operating conditions. The full range of operating conditions in the

application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;

Y5V and Z5U capacitors are not recommended for use with any LDO.

类似零件编号 - ADP151ACBZ-3.0-R7

制造商	部件名	数据表	功能描述
Analog Devices	ADP151ACBZ-3.0-R7	574Kb / 24P	Ultralow Noise, 200 mA, CMOS Linear Regulator REV. D
Analog Devices	ADP151ACBZ-3.0-R7	561Kb / 24P	Ultralow Noise, 200 mA, CMOS Linear Regulator Rev. E

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类似说明 - ADP151ACBZ-3.0-R7

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