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HY5S7B6LFP-H 数据表(PDF) 16 Page - Hynix Semiconductor |
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HY5S7B6LFP-H 数据表(HTML) 16 Page - Hynix Semiconductor |
16 / 51 page Rev 1.0 / Jan. 2007 16 11 512Mbit (32Mx16bit) Mobile SDR Memory HY5S7B6LF(P) Series COMMAND TRUTH TABLE Note : 1. Exiting Self Refresh occurs by asynchronously bringing CKE from low to high. 2. BA1/BA0 must be issued 0/0 in the mode register set, and 1/0 in the extended mode register set. Function CKEn-1 CKEn CS RAS CAS WE DQM ADDR A10 /AP BA Note Mode Register Set H X LL LL X Op Code 2 Extended Mode Register Set H X LL LL X Op Code 2 No Operation HX L H H H X X Device Deselect HX H X X X X X Bank Active H X L L H H X Row Address V Read HX L H L H Column L V Read with Autoprecharge HX L H L H X Column H V Write HX L H L L X Column L V Write with Autoprecharge HX L H L L X Column H V Precharge All Banks HX L L H L X X H X Precharge selected Bank HX L L H L X X L V Burst stop HX L H H L X X Data Write/Output Enable HX X X X Data Mask/Output Disable HX X V X Auto Refresh HH L L L H X X Self Refresh Entry HL L L L H X X Self Refresh Exit LH HX X X XX 1 LH H H Precharge Power Down Entry HL HX X X XX LH H H Precharge Power Down Exit LH HX X X XX LH H H Clock Suspend Entry HL HX X X XX LV V V Clock Suspend Exit LH X X X Deep Power Down Entry HL L H H L X X Deep Power Down Exit LH X X X |
类似零件编号 - HY5S7B6LFP-H |
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类似说明 - HY5S7B6LFP-H |
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