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HY5S5B2BLF-SE 数据表(PDF) 17 Page - Hynix Semiconductor |
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HY5S5B2BLF-SE 数据表(HTML) 17 Page - Hynix Semiconductor |
17 / 54 page Rev 1.0 / Apr. 2006 17 11 256Mbit (8Mx32bit) Mobile SDR Memory HY5S5B2BLF(P) Series BASIC FUNCTIONAL DESCRIPTION (Continued) Extended Mode Register BA1 BA0 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 10000 00 DS 00 PASR DS (Driver Strength) A6 A5 Driver Strength 00 Full 0 1 1/2 Strength 1 0 1/4 Strength 11 Reserved PASR (Partial Array Self Refresh) A2 A1 A0 Self Refresh Coverage 000 All Banks 0 0 1 Half of Total Bank (BA1=0 or Bank 0,1) 0 1 0 Quarter of Total Bank (BA1=BA0=0 or Bank 0) 011 Reserved 100 Reserved 1 0 1 Half of Bank 0(Bank 0 and Row Address MSB=0) 1 1 0 Quarter of Bank 0(Bank 0 and Row Address 2 MSBs=0) 111 Reserved |
类似零件编号 - HY5S5B2BLF-SE |
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类似说明 - HY5S5B2BLF-SE |
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