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HY5PS121621CFP-C4 数据表(PDF) 35 Page - Hynix Semiconductor

部件名 HY5PS121621CFP-C4
功能描述  512Mb DDR2 SDRAM
Download  38 Pages
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制造商  HYNIX [Hynix Semiconductor]
网页  http://www.skhynix.com/kor/main.do
标志 HYNIX - Hynix Semiconductor

HY5PS121621CFP-C4 数据表(HTML) 35 Page - Hynix Semiconductor

Back Button HY5PS121621CFP-C4 Datasheet HTML 30Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 31Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 32Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 33Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 34Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 35Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 36Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 37Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 38Page - Hynix Semiconductor  
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Rev. 0.8 / Oct. 2007
35
1HY5PS12421C(L)FP
1HY5PS12821C(L)FP
1HY5PS121621C(L)FP
17. ODT turn off time min is when the device starts to turn off ODT resistance.
ODT turn off time max is when the bus is in high impedance. Both are measured from tAOFD.
18. tHZ and tLZ transitions occur in the same access time as valid data transitions. Thesed parameters are referenced
to a specific voltage level which specifies when the device output is no longer driving(tHZ), or begins driving (tLZ).
Below figure shows a method to calculate the point when device is no longer driving (tHZ), or begins driving (tLZ)
by measuring the signal at two different voltages. The actual voltage measurement points are not critical as long as
the calculation is consistenet.
19. tRPST end point and tRPRE begin point are not referenced to a specific voltage level but specify when the device
output is no longer driving (tRPST), or begins driving (tRPRE). Below figure shows a method to calculate these
points when the device is no longer driving (tRPST), or begins driving (tRPRE). Below Figure shows a method to
calculate these points when the device is no longer driving (tRPST), or begins driving (tRPRE) by measuring the
signal at two different voltages. The actual voltage measurement points are not critical as long as the calculation is
consistent.
20. Input waveform timing with differential data strobe enabled MR[bit10] =0, is referenced from the input signal
crossing at the VIH(ac) level to the differential data strobe crosspoint for a rising signal, and from the input signal
crossing at the VIL(ac) level to the differential data strobe crosspoint for a falling signal applied to the device under
test.
21. Input waveform timing with differential data strobe enabled MR[bit10]=0, is referenced from the input signal
crossing at the VIH(dc) level to the differential data strobe crosspoint for a rising signal and VIL(dc) to the
differential data strobe crosspoint for a falling signal applied to the device under test.
22. Input waveform timing is referenced from the input signal crossing at the VIH(ac) level for a rising signal and VIL(ac) for a falling
signal applied to the device under test.
23. Input waveform timing is referenced from the input signal crossing at the VIL(dc) level for a rising signal and VIH(dc) for a falling
signal applied to the device under test.
tHZ , tRPST end point = 2*T1-T2
tLZ , tRPRE begin point = 2*T1-T2
VOH + xmV
VOH + 2xmV
VOL + 1xmV
VOL + 2xmV
tHZ
tRPST end point
VTT + 2xmV
VTT + xmV
VTT -xmV
VTT - 2xmV
tHZ
tRPRE begin point
DQS
VDDQ
VIH(ac)min
VIH(dc)min
tDH
tDS
DQS
VREF(dc)
VSS
VIL(dc)max
VIL(ac)max
tDH
tDS
Differential Input waveform timing


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