数据搜索系统,热门电子元器件搜索
  Chinese  ▼

Delete All
ON OFF
ALLDATASHEETCN.COM

X  

预览 PDF Download HTML

HY5PS121621CFP-C4 数据表(PDF) 12 Page - Hynix Semiconductor

部件名 HY5PS121621CFP-C4
功能描述  512Mb DDR2 SDRAM
Download  38 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  HYNIX [Hynix Semiconductor]
网页  http://www.skhynix.com/kor/main.do
标志 HYNIX - Hynix Semiconductor

HY5PS121621CFP-C4 数据表(HTML) 12 Page - Hynix Semiconductor

Back Button HY5PS121621CFP-C4 Datasheet HTML 8Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 9Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 10Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 11Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 12Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 13Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 14Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 15Page - Hynix Semiconductor HY5PS121621CFP-C4 Datasheet HTML 16Page - Hynix Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 12 / 38 page
background image
Rev. 0.8 / Oct. 2007
12
1HY5PS12421C(L)FP
1HY5PS12821C(L)FP
1HY5PS121621C(L)FP
3.2 DC & AC Logic Input Levels
3.2.1 Input DC Logic Level
3.2.2 Input AC Logic Level
3.2.3 AC Input Test Conditions
Note:
1. Input waveform timing is referenced to the input signal crossing through the VREF level applied to the device
under test.
2. The input signal minimum slew rate is to be maintained over the range from VREF to VIH(ac) min for rising
edges and the range from VREF to VIL(ac) max for falling edges as shown in the below figure.
3. AC timings are referenced with input waveforms switching from VIL(ac) to VIH(ac) on the positive transitions
and VIH(ac) to VIL(ac) on the negative transitions.
Symbol
Parameter
Min.
Max.
Units
Notes
VIH(dc)
dc input logic high
VREF + 0.125
VDDQ + 0.3
V
VIL(dc)
dc input logic low
- 0.3
VREF - 0.125
V
Symbol
Parameter
DDR2 400,533
DDR2 667,800
Units
Notes
Min.
Max.
Min.
Max.
VIH (ac)
ac input logic high
VREF +
0.250
-
VREF +
0.200
-V
VIL (ac)
ac input logic low
-
VREF - 0.250
-
VREF - 0.200
V
Symbol
Condition
Value
Units
Notes
VREF
Input reference voltage
0.5 * VDDQ
V1
VSWING(MAX)
Input signal maximum peak to peak swing
1.0
V
1
SLEW
Input signal minimum slew rate
1.0
V/ns
2, 3
VDDQ
VIH(ac) min
VREF
VSWING(MAX)
delta TR
delta TF
VIH(dc) min
VIL(dc) max
VIL(ac) max
VSS
Rising Slew =
delta TR
VIH(ac) min - VREF
VREF - VIL(ac) max
delta TF
Falling Slew =
< Figure : AC Input Test Signal Waveform>


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38 


数据表 下载

Go To PDF Page


链接网址




隐私政策
ALLDATASHEETCN.COM
ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn