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HY5FS123235AFCP-09 数据表(PDF) 20 Page - Hynix Semiconductor |
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HY5FS123235AFCP-09 数据表(HTML) 20 Page - Hynix Semiconductor |
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20 / 74 page  Rev. 1.2 /June. 2008 20 HY5FS123235AFCP Figure 9: Bank Activation Command Cycle Data Terminator Disable Bus snooping for READ commands other than CS# is used to control the on-die termination in the dual load configuration. See Section DRIVER & TERMINATION for more details on GDDR4 SDRAM Termination. Bank Restrictions For eight bank GDDR4 devices, there may be a need to limit the number of activates in a rolling window to ensure that the instantaneous current supplying capability of the devices is not exceeded. To reflect the true capability of the DRAM instantaneous current supply, the parameter tFAW (four activate window) is defined. No more than 4 banks may be activated in a rolling tFAW window. Converting to clocks is done by dividing tFAW (ns) by tCK (ns) and rounding up to next integer value. As an example of the rolling window, if (tFAW/tCK) rounds up to 10 clocks, and an activate command is issued in clock N, no more than three further activate commands may be issued in clocks N+1 through N+9. It is also acceptable and preferable that GDDR4 SDRAMs have no restrictions on the number of banks activated. Figure 10: tFAW ACT NOP ACT NOP NOP RD/WR NOP Row x Row x Row y Row y Col y Col y BA x BA y BA y tRRD tRCD CK# CK Command A0-A12 BA0-BA2 = Don’t Care ACT ACT ACT ACT ACT ACT ACT ACT T0 T1 T2 T3 Tm Tm+1 Tm+2 Tm+3 Tm+4 tRRD tRRD tRRD tRRD tRRD tRRD tFAW tFAW+3*tRRD CK# CK CMD |
类似零件编号 - HY5FS123235AFCP-09 |
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类似说明 - HY5FS123235AFCP-09 |
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