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H57V2562GTR-75C 数据表(PDF) 15 Page - Hynix Semiconductor |
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H57V2562GTR-75C 数据表(HTML) 15 Page - Hynix Semiconductor |
15 / 23 page Rev 1.0 / Aug. 2009 15 111 Synchronous DRAM Memory 256Mbit H57V2562GTR Series DQM TRUTH TABLE Note 1. H: High Level, L: Low Level, X: Don 't Care 2. Write DQM Latency is 0 CLK and Read DQM Latency is 2 CLK Function CKEn-1 CKEn LDQM UDQM Data Write/Output enable H X L L Data Mask/Output disable H X H H Lower byte write/Output enable, Upper byte mask/Output disable HX L H Lower byte Mask/Output disable, Upper byte write/Output enable HX H L |
类似零件编号 - H57V2562GTR-75C |
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类似说明 - H57V2562GTR-75C |
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