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H55S1G32MFP-60 数据表(PDF) 10 Page - Hynix Semiconductor

部件名 H55S1G32MFP-60
功能描述  1Gb (32Mx32bit) Mobile SDRAM
Download  53 Pages
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制造商  HYNIX [Hynix Semiconductor]
网页  http://www.skhynix.com/kor/main.do
标志 HYNIX - Hynix Semiconductor

H55S1G32MFP-60 数据表(HTML) 10 Page - Hynix Semiconductor

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Rev 1.2 / Jun. 2008
10
11
1Gbit (32Mx32bit) Mobile SDR Memory
H55S1G(2/3)2MFP Series
DC CHARACTERISTICS II (TA= -30 to 85oC)
Notes :
1. IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output open
2. See the tables of next page for more specific IDD6 current values.
3. Please contact Hynix office for more information and ability for DPD operation.
Deep Power Down operation is a hynix optional function.
Parameter
Symbol
Test Condition
Speed
Unit Note
166MHz 133MHz 105MHz
Operating Current
IDD1
Burst length=1, One bank active
tRC
≥ tRC(min), IOL=0mA
90
80
mA
1
Precharge Standby
Current
in Power Down Mode
IDD2P
CKE
≤ VIL(max), tCK = min
0.4
mA
IDD2PS
CKE
≤ VIL(max), tCK = ∞
0.4
mA
Precharge Standby
Current
in Non Power Down
Mode
IDD2N
CKE
≥ VIH(min), CS ≥ VIH(min), tCK
= min
Input signals are changed one time
during
2clks.
All other pins
≥ VDD-0.2V or ≤ 0.2V
5
mA
IDD2NS
CKE
≥ VIH(min), tCK = ∞
Input signals are stable.
2
Active Standby Current
in Power Down Mode
IDD3P
CKE
≤ VIL(max), tCK = min
3
mA
IDD3PS
CKE
≤ VIL(max), tCK = ∞
2
Active Standby Current
in Non Power Down
Mode
IDD3N
CKE
≥ VIH(min), CS ≥ VIH(min), tCK
= 15ns
Input signals are changed one time
during
2clks.
All other pins
≥ VDD-0.2V or ≤ 0.2V
10
mA
IDD3NS
CKE
≥ VIH(min), tCK = ∞
Input signals are stable.
5
Burst Mode Operating
Current
IDD4
tCK
≥ tCK(min), IOL=0mA
All banks active
70
60
mA
1
Auto Refresh Current IDD5
tRFC
≥ tRFC(min)
120
mA
Self Refresh Current
IDD6
CKE
≤ 0.2V
See Next Page
mA
2
Standby Current in
Deep Power Down
Mode
IDD7
See the Page for
“Deep Power Down Mode”
10
uA
3


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