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SE97 数据表(PDF) 22 Page - NXP Semiconductors |
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SE97 数据表(HTML) 22 Page - NXP Semiconductors |
22 / 55 page SE97_7 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 07 — 29 January 2010 22 of 55 NXP Semiconductors SE97 DDR memory module temp sensor with integrated SPD, 3.3 V 7.10.3.3 Sequential read If the master acknowledges the first data byte transmitted by the SE97, then the device will continue transmitting as long as each data byte is acknowledged by the master (Figure 21). If the end of memory is reached during sequential Read, the address counter will ‘wrap around’ to the beginning of memory, and so on. Sequential Read works with either ‘Immediate Address Read’ or ‘Selective Read’, the only difference being the starting byte address. Fig 20. Selective read timing 0 1 0 A2 A1 A0 0 A S 1 A slave address (memory) START condition R/W acknowledge from slave acknowledge from slave word address SDA 002aac901 P STOP condition data from memory A no acknowledge from master 0 1 0 A2 A1 A0 S 1 slave address (memory) START condition 1 A R/W acknowledge from slave Fig 21. Sequential read timing 0 1 0 A2 A1 A0 1 A S 1 A slave address (memory) START condition R/W acknowledge from slave acknowledge from master data from memory SDA data from memory DATA n + 1 A acknowledge from master 002aab253 P STOP condition data from memory DATA n + X A no acknowledge from master DATA n |
类似零件编号 - SE97 |
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类似说明 - SE97 |
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