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TLP113 数据表(PDF) 4 Page - Toshiba Semiconductor |
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TLP113 数据表(HTML) 4 Page - Toshiba Semiconductor |
4 / 8 page TLP113 2002-09-25 4 Switching Characteristics (VCC=5V, Ta=25°C) Characteristic Symbol Test Cir - cuit Test Condition Min. Typ. Max. Unit Propagation delay time (H ®L) tpHL 1 IF=0®16mA CL=15pF, RL=350W ― 60 120 ns Propagation delay time (L ®H) tpLH 1 IF=16®0mA CL=15pF, RL=350W ― 60 120 ns Output rise -fall time (10 -90%) tr, tf 2 RL=350W, CL=15pF IF=0 16mA ― 30 ― ns Common mode transient imunity at high output level CMH 2 IF=0mA, VCM=200Vp-p VO(min)=2V, RL=350W ― 200 ― V / ms Common mode transient imunity at low output level CML 2 IF=16mA, VCM=200Vp-p VO(max)=0.8V, RL=350W ― -500 ― V / ms (Note 4) Device considered a two-terminal device: Pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together. (Note 5) The VCC supply voltage to each TLP113 isolator must be bypassed by 0.1 mF capacitor, this can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to package VCC and GND pins of each device. (Note 6) Maximum electrostatic discharge voltage for any pins: 180V(C=200pF, R=0) |
类似零件编号 - TLP113 |
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类似说明 - TLP113 |
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