Family Configurations

MCF52259 ColdFire Microcontroller, Rev. 2

Freescale Semiconductor

5

— Up to 80 MHz processor core frequency

— 40 MHz or 33 MHz peripheral bus frequency

— Sixteen general-purpose, 32-bit data and address registers

— Implements ColdFire ISA_A with extensions to support the user stack pointer register and four new instructions

for improved bit processing (ISA_A+)

— Enhanced Multiply-Accumulate (EMAC) unit with four 32-bit accumulators to support 16

×16 → 32 or

32

×32 → 48 operations

— Cryptographic Acceleration Unit (CAU)

– Tightly-coupled coprocessor to accelerate software-based encryption and message digest functions

– Support for DES, 3DES, AES, MD5, and SHA-1 algorithms

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System debug support

— Real-time trace for determining dynamic execution path

— Background debug mode (BDM) for in-circuit debugging (DEBUG_B+)

— Real-time debug support, with six hardware breakpoints (4 PC, 1 address and 1 data) configurable into a 1- or

2-level trigger

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On-chip memories

— Up to 64-Kbyte dual-ported SRAM on CPU internal bus, supporting core, DMA, and USB access with standby

power supply support for the first 16 Kbytes

— Up to 512 Kbytes of interleaved flash memory supporting 2-1-1-1 accesses

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Power management

— Fully static operation with processor sleep and whole chip stop modes

— Rapid response to interrupts from the low-power sleep mode (wake-up feature)

— Clock enable/disable for each peripheral when not used (except backup watchdog timer)

— Software controlled disable of external clock output for low-power consumption

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FlexCAN 2.0B module

— Based on and includes all existing features of the Freescale TouCAN module

— Full implementation of the CAN protocol specification version 2.0B

– Standard data and remote frames (up to 109 bits long)

– Extended data and remote frames (up to 127 bits long)

– Zero to eight bytes data length

– Programmable bit rate up to 1 Mbit/sec

— Flexible message buffers (MBs), totalling up to 16 message buffers of 0–8 byte data length each, configurable as

Rx or Tx, all supporting standard and extended messages

— Unused MB space can be used as general purpose RAM space

— Listen-only mode capability

— Content-related addressing

— No read/write semaphores

— Three programmable mask registers: global for MBs 0–13, special for MB14, and special for MB15

— Programmable transmit-first scheme: lowest ID or lowest buffer number

— Time stamp based on 16-bit free-running timer

— Global network time, synchronized by a specific message

— Maskable interrupts

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Universal Serial Bus On-The-Go (USB OTG) dual-mode host and device controller

— Full-speed / low-speed host controller

— USB 1.1 and 2.0 compliant full-speed / low speed device controller

— 16 bidirectional end points