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LTC3854EMSE 数据表(PDF) 18 Page - Linear Technology |
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LTC3854EMSE 数据表(HTML) 18 Page - Linear Technology |
18 / 28 page LTC3854 3854fa applicaTions inForMaTion sudden step change in output voltage if the load switch resistance is low and it is driven quickly. If the ratio of CLOAD to COUT is greater than 1:50, the switch rise time should be controlled so that the load rise time is limited to approximately 25 • CLOAD. Thus a 10μF capacitor would require a 250μs rise time, limiting the charging current to about 200mA. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3854. These items are also illustrated graphically in the layout diagram of Figure 4. Check the following in your layout: Figure 4. LTC3854 Layout Diagram 1) Are the signal and power grounds segregated? The LTC3854 GND pin should tie to the ground plane close to the output capacitor(s). The low current or signal ground trace should make a single point connection directly to the GND pin. The synchronous MOSFET source pins should connect to the input capacitor(s) ground. 2) Does the VFB pin connect directly to the feedback resis- tors? The resistive divider R1, R2 must be connected between the (+) plate of COUT and signal ground. The 47pF to 100pF capacitor should be as close as possible to the LTC3854. Be careful locating the feedback resis- tors too far away from the LTC3854. The VFB line should not be routed close to any other nodes with high slew rates. 6 5 4 10 9 8 7 3 2 1 11 12 RUN/SS ITH VFB SENSE– SENSE+ SW TG BOOST VIN INTVCC BG GND LTC3854 47pF CC CSS CC2 RC 1000pF COUT R1 R2 CB DB RSENSE D1 M2 + 4.7µF M1 CIN + – – L1 VIN + VOUT 3854 F04 |
类似零件编号 - LTC3854EMSE |
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类似说明 - LTC3854EMSE |
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