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LTC3854EMSE 数据表(PDF) 16 Page - Linear Technology

部件名 LTC3854EMSE
功能描述  Small Footprint, Wide VIN Range Synchronous Step-Down DC/DC Controller
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTC3854EMSE 数据表(HTML) 16 Page - Linear Technology

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LTC3854

3854fa
applicaTions inForMaTion
sense voltage is progressively lowered from its maximum
programmedvalueto25%ofthemaximumvalue.Foldback
current limiting is disabled during soft-start.
Minimum and Maximum On-Time Considerations
Minimum on-time tON(MIN) is the smallest time duration
that the LTC3854 is capable of turning on the top MOSFET.
It is determined by internal timing delays and the gate
charge required to turn on the top MOSFET. Low duty
cycle applications may approach this minimum on-time
limit and care should be taken to ensure that
VOUT
VIN • fSW
> tON(MIN)
If the duty cycle falls below what can be accommodated
by the minimum on-time, the controller will begin to skip
cycles. The output voltage will continue to be regulated,
but the ripple voltage and current will increase.
The minimum on-time for the LTC3854 is approximately
75ns. However, as the peak sense voltage decreases the
minimum on-time gradually increases. This is of particu-
lar concern in forced continuous applications with low
ripple current at light loads. If the duty cycle drops below
the minimum on-time limit in this situation, a significant
amount of cycle skipping can occur with correspondingly
larger current and voltage ripple.
Care should also be taken for applications where the duty
cycle can approach the maximum given in the data sheet
(98%). In all low dropout applications, such as VOUT = 5V
and VIN(MIN) = 4.5V, careful selection of the bottom syn-
chronous MOSFET is required. For applications where the
input voltage can drop below the targeted output voltage,
and subsequently ramp up, a low threshold synchronous
MOSFET with a small total gate charge should be chosen.
This selection for the bottom synchronous MOSFET will
insure that the bottom gate minimum on-time is sufficient
in dropout to allow for the initial boost capacitor refresh
that is needed to adequately turn on the top side driver and
begin the switching cycle. Another method to guarantee
performance in this type of application is to increase the
minimum output load to 50mA. This minimum load will
allow the user to choose larger MOSFETs for delivery of
large currents when VIN is in the normal operating range
yetstillprovideanadequatesafetymarginandgoodoverall
performance in dropout with a slow ramping VIN.
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It
is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3854 circuits: 1) IC VIN current, 2) INTVCC
regulator current, 3) I2R losses, 4) Topside MOSFET
transition losses.
1. The VIN current is the DC supply current given in the
ElectricalCharacteristicstable,whichexcludesMOSFET
driver and control currents. VIN current typically results
in a small (<0.1%) loss.
2. INTVCC current is the sum of the MOSFET driver and
control currents. The MOSFET driver current results
from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge dQ moves
from INTVCC to ground. The resulting dQ/dt is a cur-
rent out of INTVCC that is typically much larger than the
control circuit current. In continuous mode, IGATECHG
= f(QT + QB), where QT and QB are the gate charges of
the topside and bottom side MOSFETs.
3. I2R losses are predicted from the DC resistances of the
fuse (if used), MOSFET, inductor, current sense resistor.
In continuous mode, the average output current flows
through L and RSENSE, but is “chopped” between the
topside MOSFET and the synchronous MOSFET. If the
two MOSFETs have approximately the same RDS(ON),
then the resistance of one MOSFET can simply be
summed with the resistances of L and RSENSE to obtain


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