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LTC3854EMSE 数据表(PDF) 12 Page - Linear Technology |
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LTC3854EMSE 数据表(HTML) 12 Page - Linear Technology |
12 / 28 page LTC3854 3854fa Inductor Core Selection Once the value for L is determined, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite or molypermalloy cores. Actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. As inductance increases, core losses decrease. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core loss and are preferred at high switching frequencies; allowing design goals to concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard,” which means that inductancecollapsesabruptlywhenthepeakdesigncurrent is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Power MOSFET and Schottky Diode (Optional) Selection Two external power MOSFETs must be selected for the LTC3854 controller: one N-channel MOSFET for the top (main) switch, and one N-channel MOSFET for the bottom (synchronous) switch. Thepeak-to-peakdrivelevelsaresetbytheINTVCCvoltage. This voltage is 5V during start-up. Consequently, logic- levelthresholdMOSFETscanbeusedinmostapplications. The only exception is if low input voltage is expected (VIN < 5V); then, sub-logic level threshold MOSFETs (VGS(TH) < 3V) should be used. Pay close attention to the BVDSS specification for the MOSFETs as well; most of the logic level MOSFETs are limited to 30V or less. Selection criteria for the power MOSFETs include the on-resistance RDS(ON), Miller capacitance CMILLER, input voltage and maximum output current. Miller capacitance, CMILLER, can be approximated from the gate charge curve usually provided on the MOSFET manufacturers’ data sheet. CMILLER is equal to the increase in gate charge along the horizontal axis while the curve is approximately flat divided by the specified change in VDS. This result is applicaTions inForMaTion then multiplied by the ratio of the applied VDS to the gate charge curve specified VDS. When the IC is operating in continuous mode the duty cycles for the top and bottom MOSFETs are given by: Main Switch Duty Cycle = VOUT VIN =D Synchronous Switch Duty Cycle = VIN − VOUT VIN = 1−D The MOSFET power dissipations at maximum output current are given by: PMAIN = VOUT VIN IMAX ( )2 1+δ ( )RDS(ON) + VIN ( )2 IMAX 2 RDR ( ) CMILLER ( )• 1 VINTVCC − VTH(MIN) + 1 VTH(MIN) (f) PSYNC = VIN − VOUT VIN IMAX ( )2 1+δ ( )RDS(ON) where δ is the temperature dependency of RDS(ON) and RDR (approximately 2Ω) is the effective driver resistance at the MOSFET’s Miller threshold voltage. VTH(MIN) is the typical MOSFET minimum threshold voltage. BothMOSFETshaveI2RlosseswhilethetopsideN-channel equation includes an additional term for transition losses, which are highest at high input voltages. For VIN < 20V, the high current efficiency generally improves with larger MOSFETs, while for VIN > 20V the transition losses rapidly increase to the point that the use of a higher RDS(ON)device with lower CMILLERactuallyprovideshigherefficiency.The synchronous MOSFET losses are greatest at high input voltage when the top switch duty factor is low or during short-circuit when the synchronous switch is on close to 100% of the period. The term (1 + δ) is generally given for a MOSFET in the form of a normalized RDS(ON) vs Temperature curve, but δ = 0.005/°C can be used as an approximation for low voltage MOSFETs. |
类似零件编号 - LTC3854EMSE |
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类似说明 - LTC3854EMSE |
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