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AM3505 数据表(PDF) 2 Page - Texas Instruments |
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AM3505 数据表(HTML) 2 Page - Texas Instruments |
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2 / 184 page  AM3517/05 ARM Microprocessor SPRS550 – OCTOBER 2009 www.ti.com – Interfaces to Double Data Rate (DDR2) • ARM CortexTM-A8 Memory Architecture SRAM – ARMv7 Architecture – SDRAM Memory Scheduler (SMS) and • Trust Zone Rotation Engine • Thumb-2 • General Purpose Memory Controller (GPMC) • MMU Enhancements – 16-bit Wide Multiplexed Address/Data Bus – In-Order, Dual-Issue, Superscalar – Up to 8 Chip Select Pins With 128M-Byte Microprocessor Core Address Space per Chip Select Pin – NEON Multimedia Architecture – Glueless Interface to NOR Flash, NAND – Over 2x Performance of ARMv6 SIMD Flash (With ECC Hamming Code – Supports Both Integer and Floating Point Calculation), SRAM and Pseudo-SRAM SIMD – Flexible Asynchronous Protocol Control for – JAZELLE RCT Execution Environment Interface to Custom Logic (FPGA, CPLD, Architecture ASICs, etc.) – Dynamic Branch Prediction with Branch – Nonmultiplexed Address/Data Mode Target Address Cache, Global history (Limited 2K-Byte Address Space) buffer and 8 entry return stack • Test Interfaces – Embedded Trace Macrocell [ETM] support – IEEE-1149.1 (JTAG) Boundary-Scan for Non_invasive Debug Compatible – 16K-Byte instruction Cache (4-Way set- – Embedded Trace Macro Interface (ETM) associative) – Serial Data Transport Interface (SDTI) – 16K-Byte Data Cache (4-Way Set-Associative) • 65-nm CMOS technology – 256K-Byte L2 Cache • Applications: • POWERVR SGX™ Graphics Accelerator – Single Board Computers – Tile Based Architecture Delivering up to 10 – Industrial and Home Automation MPoly/sec – Digital Signage – Universal Scalable Shader Engine: – Point-of-Sale Devices Multi-threaded Engine Incorporating Pixel – Portable Media Player and Vertex Shader Functionality – Portable Industrial – Industry Standard API Support: OpenGLES – Transportation 1.1 and 2.0, OpenVG1.0 – Navigation – Fine Grained Task Switching, Load – Smart White Goods Balancing, and Power Management – Digital TV – Programmable, High-Quality Image Anti-Aliasing – Digital Video Camera – Gaming • Endianess – Notes: – ARM Instructions - Little Endian *Operating condition restrictions apply. – ARM Data – Configurable **Different memory controller to support • SDRC Memory Controller DDR2. New IP support for VPFE, EMAC, – 16, 32-bit Memory Controller With 1G-Byte and HECC. Total Address Space 2 AM3517/05 ARM Microprocessor Submit Documentation Feedback |
类似零件编号 - AM3505 |
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类似说明 - AM3505 |
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