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AD9572ACPZLVD-RL 数据表(PDF) 7 Page - Analog Devices

部件名 AD9572ACPZLVD-RL
功能描述  Fiber Channel/Ethernet Clock Generator IC, PLL Core, Dividers, 7 Clock Outputs
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9572ACPZLVD-RL 数据表(HTML) 7 Page - Analog Devices

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AD9572
Rev. 0 | Page 7 of 20
CONTROL PINS
Typical (typ) is given for VS = 3.3 V ± 10%, TA = 25°C, unless otherwise noted. Minimum (min) and maximum (max) values are given
over full VS and TA (−40°C to +85°C) variation.
Table 8.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
INPUT CHARACTERISTICS
REFSEL Pin
REFSEL has a 30 kΩ pull-up resistor.
Logic 1 Voltage
2.0
V
Logic 0 Voltage
0.8
V
Logic 1 Current
1.0
μA
Logic 0 Current
155
μA
FREQSEL Pin
FREQSEL has a 150 kΩ pull-up resistor and a
100 kΩ pull-down resistor.
Logic 1 Voltage
2/3(VS) + 0.2
V
Logic 0 Voltage
1/3(VS) − 0.2
V
Logic 1 Current
45
μA
Logic 0 Current
30
μA
FORCE_LOW Pin
FORCE_LOW has a 16 kΩ pull-down resistor.
Logic 1 Voltage
2.0
V
Logic 0 Voltage
0.8
V
Logic 1 Current
240
μA
Logic 0 Current
2.0
μA
POWER
Typical (typ) is given for VS = 3.3 V ± 10%, TA = 25°C, unless otherwise noted. Minimum (min) and maximum (max) values are given
over full VS and TA (−40°C to +85°C) variation.
Table 9.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
Power Supply
3.0
3.3
3.6
V
LVDS Power Dissipation
715
870
mW
LVPECL Power Dissipation
1075
1305
mW
CRYSTAL OSCILLATOR
Typical (typ) is given for VS = 3.3 V ± 10%, TA = 25°C, unless otherwise noted. Minimum (min) and maximum (max) values are given
over full VS and TA (−40°C to +85°C) variation.
Table 10.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
CRYSTAL SPECIFICATION
Fundamental mode
Frequency
25
MHz
ESR
50
Ω
Load Capacitance
14
pF
Phase Noise
−135
dBc/Hz
@ 1 kHz offset
Stability
−30
+30
ppm


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