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LT3650IDD-4.2 数据表(PDF) 10 Page - Linear Technology |
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LT3650IDD-4.2 数据表(HTML) 10 Page - Linear Technology |
10 / 20 page LT3650-4.1/LT3650-4.2 10 36504142fb OPERATION The ITH error voltage corresponds linearly to average current sensed across the inductor current sense resistor, allowing maximum charge current control by limiting the effective voltage range of ITH. A clamp limits this voltage to 1V which, in turn, limits the current sense voltage to 100mV. This sets the maximum charge current, or the current delivered while the charger is operating in con- stant-current (CC) mode, which corresponds to 100mV across RSENSE. This maximum charge current level can also be manipulated through the RNG/SS pin (see the RNG/SS: Dynamic Charge Current Adjust and RNG/SS: Soft-Start sections). If the voltage on the BAT pin is below VBAT(PRE), the LT3650 engages precondition mode. During the precondition inter- val, the charger continues to operate in constant-current mode, but the maximum charge current is reduced to 15% of the maximum programmed value as set by RSENSE. When the charger output voltage on the BAT pin approaches the float voltage (VBAT(FLT)), the charger transitions into constant-voltage (CV) mode, and charge current is reduced from the maximum value. As this occurs, the ITH voltage falls from the limit clamp and servos to lower voltages. The IC monitors the ITH voltage as it is reduced, and detection of the C/10 charge current is achieved when ITH = 0.1V. If the charger is configured for C/10 termina- tion, this threshold is used to terminate the charge cycle. Once the charge cycle is terminated, the CHRG status pin becomes high impedance and the charger enters low current standby mode. The LT3650 contains an internal charge cycle timer that terminates a successful charge cycle after a programmed amount of time. This timer is typically programmed to achieve end-of-cycle (EOC) in three hours, but can be configured for any amount of time by setting an appropriate timing capacitor value (CTIMER). When timer termination is used, the charge cycle does not terminate after C/10 is achieved. Because the CHRG status pin responds to the C/10 current level, the IC will indicate a fully charged battery status, but the charger will continue to source low currents into the battery until the programmed EOC time has elapsed, at which time the charge cycle will terminate. At EOC, when the charging cycle terminates, if the battery did not achieve at least 97.5% of the full float voltage, charging is deemed unsuccessful. The LT3650 will then re-initiate, and charging will continue for another full timer cycle. Use of the timer function also enables bad-battery detec- tion. This fault condition is achieved if the battery does not respond to preconditioning and the charger remains in (or enters) precondition mode after one-eighth of the programmed charge cycle time. A bad-battery fault halts the charging cycle, the CHRG status pin goes high imped- ance and the FAULT pin is pulled low. When the LT3650 terminates a charging cycle, whether through C/10 detection or by reaching timer EOC, the average current mode analog loop remains active but the internal float voltage reference is reduced by 2.5%. Because the voltage on a successfully charged battery is at the full float voltage, the voltage error amp detects an overvoltage condition and rails low. When the voltage error amp output drops below 0.3V, the IC enters standby mode, where most of the internal circuitry is disabled, and the VIN bias current is reduced to 85μA. When the voltage on the BAT pin drops below the reduced float reference level, the output of the voltage error amp will climb, at which point the IC comes out of standby mode and a new charging cycle is initiated. |
类似零件编号 - LT3650IDD-4.2 |
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类似说明 - LT3650IDD-4.2 |
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