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SN74LVC2952ADBRE4 数据表(PDF) 1 Page - Texas Instruments |
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SN74LVC2952ADBRE4 数据表(HTML) 1 Page - Texas Instruments |
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1 / 14 page  www.ti.com FEATURES 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 B8 B7 B6 B5 B4 B3 B2 B1 OEAB CLKAB CLKENAB GND VCC A8 A7 A6 A5 A4 A3 A2 A1 OEBA CLKBA CLKENBA DB, DW, NS, OR PW PACKAGE (TOP VIEW) DESCRIPTION/ORDERING INFORMATION SN74LVC2952A OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS SCAS311I – JANUARY 1993 – REVISED MARCH 2005 • Operates From 1.65 V to 3.6 V • Inputs Accept Voltages to 5.5 V • Max tpd of 8.2 ns at 3.3 V • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C • Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC) • Ioff Supports Partial-Power-Down Mode Operation • Latch-Up Performance Exceeds 250 mA Per JESD 17 • ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 1000-V Charged-Device Model (C101) This octal bus transceiver and register is designed for 1.65-V to 3.6-V VCC operation. The SN74LVC2952A consists of two 8-bit back-to-back registers that store data flowing in both directions between two bidirectional buses. Data on the A or B bus is stored in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input, provided that the clock-enable (CLKENAB or CLKENBA) input is low. Taking the output-enable (OEAB or OEBA) input low accesses the data on either port. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION TA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING Tube of 25 SN74LVC2952ADW SOIC – DW LVC2952A Reel of 2000 SN74LVC2952ADWR SOP – NS Reel of 2000 SN74LVC2952ANSR LVC2952A –40 °C to 85°C SSOP – DB Reel of 2000 SN74LVC2952ADBR LE952A Tube of 60 SN74LVC2952APW TSSOP – PW Reel of 2000 SN74LVC2952APWR LE952A Reel of 250 SN74LVC2952APWT (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 1993–2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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