SN74CBTLV16800

LOW-VOLTAGE 20-BIT FET BUS SWITCH

WITH PRECHARGED OUTPUTS

SCDS045F – DECEMBER 1997 – REVISED MAY 1999

1

POST OFFICE BOX 655303

Voltage to Minimize Signal Distortion

During Live Insertion

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

JESD 78, Class II

Shrink Small-Outline (DGG), Thin Very

Small-Outline (DGV), and 300-mil Shrink

Small-Outline (DL) Packages

NOTE: For tape and reel order entry:

The DGGR package is abbreviated to GR, and

the DGVR package is abbreviated to VR.

description

The SN74CBTLV16800 provides 20 bits of

high-speed bus switching. The low on-state

resistance of the switch allows connections to be

made with minimal propagation delay. The device

also precharges the B port to a user-selectable

bias voltage (BIASV) to minimize live-insertion

noise.

The device is organized as dual 10-bit bus switches with separate output-enable (OE) inputs. It can be used

as two 10-bit bus switches or one 20-bit bus switch. When OE is low, the associated 10-bit bus switch is on,

and port A is connected to port B. When OE is high, the switch is open, the high-impedance state exists between

the two ports, and port B is precharged to BIASV through the equivalent of a 10-k

Ω resistor.

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBTLV16800 is characterized for operation from –40

°C to 85°C.

FUNCTION TABLE

(each 10-bit bus switch)

INPUT

OE

FUNCTION

L

A port = B port

H

A port = Z

B port = BIASV

Copyright

© 1999, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DGG, DGV, OR DL PACKAGE

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BIASV

1A1

1A2

1A3

1A4

1A5

1A6

GND

1A7

1A8

1A9

1A10

2A1

2A2

2A3

GND

2A4

2A5

2A6

2A7

2A8

2A9

2A10

1OE

2OE

1B1

1B2

1B3

1B4

1B5

GND

1B6

1B7

1B8

1B9

1B10

2B1

2B2

2B3

GND

2B4

2B5

2B6

2B7

2B8

2B9

2B10