DW OR NT PACKAGE

(TOP VIEW)

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OE

1D

2D

3D

4D

5D

6D

7D

8D

9D

10D

GND

1Q

2Q

3Q

4Q

5Q

6Q

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8Q

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10Q

CLK

SN74BCT29821

10-BIT BUS-INTERFACE FLIP-FLOP

WITH 3-STATE OUTPUTS

SCBS021D – FEBRUARY 1989 – REVISED NOVEMBER 1993

Copyright

2–1

POST OFFICE BOX 655303

MIL-STD-883C, Method 3015; Exceeds

200 V Using Machine Model (C = 200 pF,

R = 0)

Lines Directly

Small-Outline (DW) Packages and Standard

Plastic 300-mil DIPs (NT)

description

This 10-bit bus-interface flip-flop features 3-state

outputs designed specifically for driving highly

capacitive or relatively low-impedance loads. It is

particularly suitable for implementing wider buffer

registers, I/O ports, bidirectional bus drivers with

parity, and working registers.

The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs will

be true to the data (D) inputs.

A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high or

low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines

significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need

for interface or pullup components.

The output enable (OE) does not affect the internal operation of the flip-flops. Old data can be retained or new

data can be entered while the outputs are in the high-impedance state.

The SN74BCT29821 is characterized for operation from 0

°C to 70°C.

FUNCTION TABLE

(each flip-flop)

INPUTS

OUTPUT

OE

CLK

D

Q

L

↑

H

H

L

↑

LL

L

H or L

X

Q0

H

X

X

Z

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.