SN54ABT18640, SN74ABT18640

SCAN TEST DEVICES

WITH 18-BIT INVERTING BUS TRANSCEIVERS

SCBS267C – FEBRUARY 1994 – REVISED JULY 1996

2

POST OFFICE BOX 655303

description (continued)

Four dedicated test pins observe and control the operation of the test circuitry: test data input (TDI), test data

output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry performs other testing

functions such as parallel-signature analysis (PSA) on data inputs and pseudo-random pattern generation

(PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface.

The SN74ABT18640 is available in TI’s shrink small-outline (DL) and thin shrink small-outline (DGG) packages,

which provide twice the I/O pin count and functionality of standard small-outline packages in the same

printed-circuit-board area.

The SN54ABT18640 is characterized for operation over the full military temperature range of –55

°C to 125°C.

The SN74ABT18640 is characterized for operation from –40

°C to 85°C.

FUNCTION TABLE

(normal mode, each 9-bit section)

INPUTS

OPERATION

OE

DIR

OPERATION

L

L

B data to A bus

L

HA data to B bus

H

X

Isolation