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EPM1270T100I 数据表(PDF) 57 Page - Altera Corporation

部件名 EPM1270T100I
功能描述  MAX II Device Family
Download  86 Pages
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制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation

EPM1270T100I 数据表(HTML) 57 Page - Altera Corporation

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Chapter 4: Hot Socketing and Power-On Reset in MAX II Devices
4–7
Power-On Reset Circuitry
© October 2008
Altera Corporation
MAX II Device Handbook
1 After SRAM configuration, all registers in the device are cleared and released into
user function before I/O tri-states are released. To release clears after tri-states are
released, use the DEV_CLRn pin option. To hold the tri-states beyond the power-up
configuration time, use the DEV_OE pin option.
Figure 4–5. Power-Up Characteristics for MAX II, MAX IIG, and MAX IIZ Devices (Note 1), (2)
Notes to Figure 4–5:
(1) Time scale is relative.
(2) Figure 4–5 assumes all VCCIO banks power up simultaneously with the VCCINT profile shown. If not, tCONFIG stretches out until all VCCIO banks are powered.
3.3 V
1.55 V
Tri-State
User Mode
Operation
0 V
1.8 V
Tri-State
1.4 V
3.3 V
0 V
2.5 V
1.7 V
Device Resets
the SRAM and
Tri-States I/O Pins
Approximate Voltage
for SRAM Download Start
MAX II Device
1.4 V
MAX IIG Device
Device Resets
the SRAM and
Tri-States I/O Pins
Approximate Voltage
for SRAM Download Start
3.3 V
1.55 V
Tri-State
User Mode
Operation
0 V
1.8 V
Tri-State
1.4 V
MAX IIZ Device
Approximate Voltage
for SRAM Download Start
VCCINT must be powered down
to 0 V if the VCCINT
dips below this level
tCONFIG
tCONFIG
tCONFIG
tCONFIG
User Mode
Operation
VCCINT
VCCINT
VCCINT
Tri-State
User Mode
Operation
Tri-State
minimum 10
µs


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