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EPM240T100I 数据表(PDF) 18 Page - Altera Corporation |
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EPM240T100I 数据表(HTML) 18 Page - Altera Corporation |
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18 / 86 page  2–10 Chapter 2: MAX II Architecture Logic Elements MAX II Device Handbook © October 2008 Altera Corporation The other two LUTs use the data1 and data2 signals to generate two possible carry-out signals: one for a carry of 1 and the other for a carry of 0. The carry-in0 signal acts as the carry-select for the carry-out0 output and carry-in1 acts as the carry- select for the carry-out1 output. LEs in arithmetic mode can drive out registered and unregistered versions of the LUT output. The dynamic arithmetic mode also offers clock enable, counter enable, synchronous up/down control, synchronous clear, synchronous load, and dynamic adder/subtractor options. The LAB local interconnect data inputs generate the counter enable and synchronous up/down control signals. The synchronous clear and synchronous load options are LAB-wide signals that affect all registers in the LAB. The Quartus II software automatically places any registers that are not used by the counter into other LABs. The addnsub LAB-wide signal controls whether the LE acts as an adder or subtractor. Carry-Select Chain The carry-select chain provides a very fast carry-select function between LEs in dynamic arithmetic mode. The carry-select chain uses the redundant carry calculation to increase the speed of carry functions. The LE is configured to calculate outputs for a possible carry-in of 0 and carry-in of 1 in parallel. The carry-in0 and carry-in1 signals from a lower-order bit feed forward into the higher-order bit via the parallel carry chain and feed into both the LUT and the next portion of the carry chain. Carry- select chains can begin in any LE within an LAB. Figure 2–8. LE in Dynamic Arithmetic Mode Note to Figure 2–8: (1) The addnsub signal is tied to the carry input for the first LE of a carry chain only. data1 LUT data2 data3 addnsub (LAB Wide) clock (LAB Wide) ena (LAB Wide) aclr (LAB Wide) ALD/PRE CLRN D Q ENA ADATA Register chain connection LUT LUT LUT Carry-Out1 Carry-Out0 LAB Carry-In Carry-In0 Carry-In1 (1) sclear (LAB Wide) sload (LAB Wide) LUT chain connection Register chain output Row, column, and direct link routing Row, column, and direct link routing Local routing aload (LAB Wide) Register Feedback |
类似零件编号 - EPM240T100I |
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类似说明 - EPM240T100I |
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