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EPM570M100C 数据表(PDF) 22 Page - Altera Corporation |
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EPM570M100C 数据表(HTML) 22 Page - Altera Corporation |
22 / 86 page 2–14 Chapter 2: MAX II Architecture MultiTrack Interconnect MAX II Device Handbook © October 2008 Altera Corporation functions from LE 1 to LE 10 in the same LAB. The register chain connection allows the register output of one LE to connect directly to the register input of the next LE in the LAB for fast shift registers. The Quartus II Compiler automatically takes advantage of these resources to improve utilization and performance. Figure 2–11 shows the LUT chain and register chain interconnects. The C4 interconnects span four LABs up or down from a source LAB. Every LAB has its own set of C4 interconnects to drive either up or down. Figure 2–12 shows the C4 interconnect connections from an LAB in a column. The C4 interconnects can drive and be driven by column and row IOEs. For LAB interconnection, a primary LAB or its vertical LAB neighbor can drive a given C4 interconnect. C4 interconnects can drive each other to extend their range as well as drive row interconnects for column- to-column connections. Figure 2–11. LUT Chain and Register Chain Interconnects LE0 LE1 LE2 LE3 LE4 LE5 LE6 LE7 LE8 LE9 LUT Chain Routing to Adjacent LE Local Interconnect Register Chain Routing to Adjacent LE's Register Input Local Interconnect Routing Among LEs in the LAB |
类似零件编号 - EPM570M100C |
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类似说明 - EPM570M100C |
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