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EPM240M100C 数据表(PDF) 75 Page - Altera Corporation |
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EPM240M100C 数据表(HTML) 75 Page - Altera Corporation |
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75 / 86 page  Chapter 5: DC and Switching Characteristics 5–17 Timing Model and Specifications © Novermber 2008 Altera Corporation MAX II Device Handbook External Timing Parameters External timing parameters are specified by device density and speed grade. All external I/O timing parameters shown are for the 3.3-V LVTTL I/O standard with the maximum drive strength and fast slew rate. For external I/O timing using standards other than LVTTL or for different drive strengths, use the I/O standard input and output delay adders in Table 5–27 through Table 5–28. f For more information about each external timing parameters symbol, refer to the Understanding Timing in MAX II Devices chapter in the MAX II Device Handbook. Figure 5–5. UFM Erase Waveform Table 5–22. Routing Delay Internal Timing Microparameters Routing –3 Speed Grade –4 Speed Grade –5 Speed Grade –6 Speed Grade –7 Speed Grade Unit Min Max Min Max Min Max Min Max Min Max t C4 — 429 — 556 — 687 — (1) — (1) ps t R4 — 326 — 423 — 521 — (1) — (1) ps t LOCAL — 330 — 429 — 529 — (1) — (1) ps Note to Table 5–22: (1) The numbers will only be available in a later revision. ARShft ARClk ARDin DRShft DRClk DRDin DRDout Program Erase Busy 9 Address Bits t ASU t ACLK t AH t ADH t ADS t EB t EPMX t OSCS t OSCH OSC_ENA t BE |
类似零件编号 - EPM240M100C |
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类似说明 - EPM240M100C |
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