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EP2SGX60D 数据表(PDF) 91 Page - Altera Corporation

部件名 EP2SGX60D
功能描述  Stratix II GX Device
Download  314 Pages
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制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
标志 ALTERA - Altera Corporation

EP2SGX60D 数据表(HTML) 91 Page - Altera Corporation

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Altera Corporation
2–83
October 2007
Stratix II GX Device Handbook, Volume 1
Stratix II GX Architecture
Table 2–21 shows the number of DSP blocks in each Stratix II GX device.
DSP block multipliers can optionally feed an adder/subtractor or
accumulator in the block, depending on the configuration, which makes
routing to ALMs easier, saves ALM routing resources, and increases
performance because all connections and blocks are in the DSP block.
Additionally, the DSP block input registers can efficiently implement shift
registers for FIR filter applications, and DSP blocks support Q1.15 format
rounding and saturation. Figure 2–58 shows the top-level diagram of the
DSP block configured for 18 × 18-bit multiplier mode.
Table 2–21. DSP Blocks in Stratix II GX Devices
Note (1)
Device
DSP Blocks
Total 9 × 9
Multipliers
Total 18 × 18
Multipliers
Total 36 × 36
Multipliers
EP2SGX30
16
128
64
16
EP2SGX60
36
288
144
36
EP2SGX90
48
384
192
48
EP2SGX130
63
504
252
63
Note to Table 2–21:
(1)
This list only shows functions that can fit into a single DSP block. Multiple DSP
blocks can support larger multiplication functions.


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