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EPF10K10 Datasheet(数据表) 1 Page - Altera Corporation

部件型号  EPF10K10
说明  Embedded Programmable Logic Device Family
下载  128 Pages
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制造商  ALTERA [Altera Corporation]
网页  http://www.altera.com
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EPF10K10 Datasheet(HTML) 1 Page - Altera Corporation

 
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Altera Corporation
1
FLEX 10K
Embedded Programmable
Logic Device Family
January 2003, ver. 4.2
Data Sheet
DS-F10K-4.2
®
Includes
FLEX 10KA
Features...
The industry’s first embedded programmable logic device (PLD)
family, providing System-on-a-Programmable-Chip (SOPC)
integration
Embedded array for implementing megafunctions, such as
efficient memory and specialized logic functions
Logic array for general logic functions
High density
10,000 to 250,000 typical gates (see Tables 1 and 2)
Up to 40,960 RAM bits; 2,048 bits per embedded array block
(EAB), all of which can be used without reducing logic capacity
System-level features
MultiVoltTM I/O interface support
5.0-V tolerant input pins in FLEX® 10KA devices
Low power consumption (typical specification less than 0.5 mA
in standby mode for most devices)
FLEX 10K and FLEX 10KA devices support peripheral
component interconnect Special Interest Group (PCI SIG) PCI
Local Bus Specification, Revision 2.2
FLEX 10KA devices include pull-up clamping diode, selectable
on a pin-by-pin basis for 3.3-V PCI compliance
Select FLEX 10KA devices support 5.0-V PCI buses with eight or
fewer loads
Built-in Joint Test Action Group (JTAG) boundary-scan test
(BST) circuitry compliant with IEEE Std. 1149.1-1990, available
without consuming any device logic
Table 1. FLEX 10K Device Features
Feature
EPF10K10
EPF10K10A
EPF10K20
EPF10K30
EPF10K30A
EPF10K40
EPF10K50
EPF10K50V
Typical gates (logic and RAM) (1)
10,000
20,000
30,000
40,000
50,000
Maximum system gates
31,000
63,000
69,000
93,000
116,000
Logic elements (LEs)
576
1,152
1,728
2,304
2,880
Logic array blocks (LABs)
72
144
216
288
360
Embedded array blocks (EABs)
3
6
6
8
10
Total RAM bits
6,144
12,288
12,288
16,384
20,480
Maximum user I/O pins
150
189
246
189
310




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