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EP2A15 Datasheet(数据表) 3 Page - Altera Corporation |
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EP2A15 Datasheet(HTML) 3 Page - Altera Corporation |
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3 page 
Altera Corporation 3 APEX II Programmable Logic Device Family Data Sheet – Programmable output drive for 3.3-V LVTTL at 4 mA, 12 mA, 24 mA, or I/O standard levels – Programmable output slew-rate control reduces switching noise – Hot-socketing operation supported – Pull-up resistor on I/O pins before and during configuration ■ Enhanced internal memory structure – High-density 4,096-bit ESBs – Dual-Port+ RAM with bidirectional read and write ports – Support for many other memory functions, including CAM, FIFO, and ROM – ESB packing mode partitions one ESB into two 2,048-bit blocks ■ Device configuration – Fast byte-wide synchronous configuration minimizes in-circuit reconfiguration time – Device configuration supports multiple voltages (either 3.3 V and 2.5 V or 1.8 V) ■ Flexible clock management circuitry with eight general-purpose PLL outputs – Four general-purpose PLLs with two outputs per PLL – Built-in low-skew clock tree – Eight global clock signals – ClockLockTM feature reducing clock delay and skew – ClockBoostTM feature providing clock multiplication (by 1 to 160) and division (by 1 to 256) – ClockShiftTM feature providing programmable clock phase and delay shifting with coarse (90°, 180°, or 270°) and fine (0.5 to 1.0 ns) resolution ■ Advanced interconnect structure – All-layer copper interconnect for high performance – Four-level hierarchical FastTrack® interconnect structure for fast, predictable interconnect delays – Dedicated carry chain that implements arithmetic functions such as fast adders, counters, and comparators (automatically used by software tools and megafunctions) – Dedicated cascade chain that implements high-speed, high-fan-in logic functions (automatically used by software tools and megafunctions) – Interleaved local interconnect allowing one LE to drive 29 other LEs through the fast local interconnect ■ Advanced software support – Software design support and automatic place-and-route provided by the Altera® QuartusTM II development system for Windows-based PCs, Sun SPARCstations, and HP 9000 Series 700/800 workstations –Altera MegaCore® functions and Altera Megafunction Partners Program (AMPPSM) megafunctions optimized for APEX II architecture |
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