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74AC16244DGG 数据表(PDF) 5 Page - Texas Instruments |
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74AC16244DGG 数据表(HTML) 5 Page - Texas Instruments |
5 / 10 page 54AC16244, 74AC16244 16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCAS120A – MARCH 1990 – REVISED APRIL 1996 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM TO TA = 25°C 54AC16244 74AC16244 UNIT PARAMETER (INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX UNIT tPLH A Y 2 7.1 9.4 2 10.8 2 10.8 ns tPHL A Y 2.4 8.3 10.7 2.4 11.8 2.4 11.8 ns tPZH OE Y 2.2 7.5 10 2.2 11.5 2.2 11.5 ns tPZL OE Y 2.9 10.4 13 2.9 14.6 2.9 14.6 ns tPHZ OE Y 4.1 6.8 8.4 4.1 9.1 4.1 9.1 ns tPLZ OE Y 3.7 6.5 8.1 3.7 8.8 3.7 8.8 ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM TO TA = 25°C 54AC16244 74AC16244 UNIT PARAMETER (INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX UNIT tPLH A Y 1.6 4.6 6.3 1.6 7.1 1.6 7.1 ns tPHL A Y 2 5.3 7 2 7.9 2 7.9 ns tPZH OE Y 1.7 4.8 6.7 1.7 7.5 1.7 7.5 ns tPZL OE Y 2.2 6.1 8.1 2.2 9 2.2 9 ns tPHZ OE Y 4 6.4 7.8 4 8.4 4 8.4 ns tPLZ OE Y 3.5 5.5 7.2 3.5 7.6 3.5 7.6 ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS TYP UNIT C d Power dissipation capacitance per latch Outputs enabled CL =50 pF f=1MHz 43 pF Cpd Power dissipation capacitance per latch Outputs disabled CL = 50 pF, f = 1 MHz 7 pF PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. |
类似零件编号 - 74AC16244DGG |
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类似说明 - 74AC16244DGG |
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