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HV4530 数据表(PDF) 2 Page - Supertex, Inc |
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HV4530 数据表(HTML) 2 Page - Supertex, Inc |
2 / 6 page 2 Symbol Parameter Min Max Units Conditions fCLK Clock frequency 8 MHz t WH/tWL Clock width high or low 62 ns tSU Data set-up time before clock rises 50 ns tH Data hold time after clock rises 20 ns t ON Turn ON time, HV OUT from enable 400 ns R L = 10K to VOO MAX tDHL Delay time clock to data high to low 100 ns CL = 15pF t DLH Delay time clock to data low to high 100 ns C L = 15pF t DLE Delay time clock to LE low to high 50 ns tWLE Width of LE pulse 50 ns t SLE LE set-up time before clock falls 50 ns Symbol Parameter Min Max Units Conditions IDD VDD supply current -15 mA fCLK = 8 MHz FDATA = 4 MHz IDDQ Quiescent VDD supply current -100 µAVIN = VSS or VDD I O(OFF) Off state output current -100 µA All SWS parallel IIH High-level logic input current -1 µAVIH = VDD IIL Low-level logic input current +1 µAVIL = VSS V OH High-level output data out V DD + 1.0V V I Dout = -100µA VOL Low-level output voltage HVOUT -30.0 V IHVout = -60mA Data out -1.0 V IDout = -100µA V OC HV OUT clamp voltage +1.5 V I OL = +60mA Electrical Characteristics1 (over recommended operating conditions unless noted) HV4530//HV4630 DC Characteristics AC Characteristics (V DD = -12V, TC = 25°C) Recommended Operating Conditions Symbol Parameter Min Max Units V DD Logic supply voltage -10.8 -13.2 V HV OUT Output off voltage +0.3 -300 V VIH High-level input voltage (LOGIC “1”) VDD + 2V VDD V V IL Low-level input voltage (LOGIC “0”) 0 -2.0 V f CLK Clock frequency 8 MHz TA Operating free-air temperature -40 +85 °C Note: All voltages are referenced to VSS. |
类似零件编号 - HV4530 |
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类似说明 - HV4530 |
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