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ATF1504ASV_05 Datasheet(数据表) 14 Page - ATMEL Corporation

部件型号  ATF1504ASV
说明  Low-voltage, Complex Programmable Logic Device
下载  31 Pages
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制造商  ATMEL [ATMEL Corporation]
网页  http://www.atmel.com
标志 ATMEL - ATMEL Corporation

ATF1504ASV Datasheet(HTML) 14 Page - ATMEL Corporation

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14
ATF1504ASV(L)
1409J–PLD–6/05
Notes:
1. See ordering information for valid part numbers.
2. The t
RPA parameter must be added to the tLAD, tLAC,tTIC, tACL, and tSEXP parameters for macrocells running in the reduced-
power mode.
3. See ordering information for valid part numbers.
Input Test Waveforms and Measurement Levels
t
R, tF = 1.5 ns typical
Output AC Test Loads
tZX2
Output Buffer Enable Delay
(Slow slew rate = OFF; V
CCIO = 3.3V; CL = 35 pF)
79
ns
tZX3
Output Buffer Enable Delay
(Slow slew rate = ON; V
CCIO = 5.0V/3.3V; CL = 35 pF)
10
11
ns
tXZ
Output Buffer Disable Delay (CL = 5 pF)
6
7
ns
tSU
Register Setup Time
5
6
ns
t
H
Register Hold Time
4
5
ns
tFSU
Register Setup Time of Fast Input
2
2
ns
tFH
Register Hold Time of Fast Input
2
2
ns
t
RD
Register Delay
2
2.5
ns
tCOMB
Combinatorial Delay
2
3
ns
tIC
Array Clock Delay
6
7
ns
t
EN
Register Enable Time
6
7
ns
tGLOB
Global Control Delay
2
3
ns
tPRE
Register Preset Time
4
5
ns
t
CLR
Register Clear Time
4
5
ns
tUIM
Switch Matrix Delay
2
2.5
ns
t
RPA
Reduced-power Adder(2)
10
13
ns
AC Characteristics (Continued)
Symbol
Parameter
-15
-20
Units
Min
Max
Min
Max
R1 = 703
3.0V
OUTPUT
PIN
CL = 35 pF
R2 = 8060




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