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CDB43L22 数据表(PDF) 4 Page - Cirrus Logic |
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CDB43L22 数据表(HTML) 4 Page - Cirrus Logic |
4 / 68 page 4 DS792F1 CS43L22 Confidential Draft 10/7/08 7.2.1 Power Down .......................................................................................................................... 38 7.3 Power Control 2 (Address 04h) ...................................................................................................... 39 7.3.1 Headphone Power Control .................................................................................................... 39 7.3.2 Speaker Power Control ......................................................................................................... 39 7.4 Clocking Control (Address 05h) ..................................................................................................... 39 7.4.1 Auto-Detect ........................................................................................................................... 39 7.4.2 Speed Mode .......................................................................................................................... 40 7.4.3 32kHz Sample Rate Group ................................................................................................... 40 7.4.4 27 MHz Video Clock .............................................................................................................. 40 7.4.5 Internal MCLK/LRCK Ratio ................................................................................................... 40 7.4.6 MCLK Divide By 2 ................................................................................................................. 41 7.5 Interface Control 1 (Address 06h) .................................................................................................. 41 7.5.1 Master/Slave Mode ............................................................................................................... 41 7.5.2 SCLK Polarity ........................................................................................................................ 41 7.5.3 DSP Mode ............................................................................................................................. 41 7.5.4 DAC Interface Format ........................................................................................................... 41 7.5.5 Audio Word Length ................................................................................................................ 42 7.6 Interface Control 2 (Address 07h) .................................................................................................. 42 7.6.1 SCLK equals MCLK .............................................................................................................. 42 7.6.2 Speaker/Headphone Switch Invert ........................................................................................ 42 7.7 Passthrough x Select: PassA (Address 08h), PassB (Address 09h) ............................................. 43 7.7.1 Passthrough Input Channel Mapping .................................................................................... 43 7.8 Analog ZC and SR Settings (Address 0Ah) ................................................................................... 43 7.8.1 Ch. x Analog Soft Ramp ........................................................................................................ 43 7.8.2 Ch. x Analog Zero Cross ....................................................................................................... 43 7.9 Passthrough Gang Control (Address 0Ch) .................................................................................... 43 7.9.1 Passthrough Channel B=A gang Control .............................................................................. 43 7.10 Playback Control 1 (Address 0Dh) ............................................................................................... 44 7.10.1 Headphone Analog Gain ..................................................................................................... 44 7.10.2 Playback Volume Setting B=A ............................................................................................ 44 7.10.3 Invert PCM Signal Polarity .................................................................................................. 44 7.10.4 Master Playback Mute ......................................................................................................... 44 7.11 Miscellaneous Controls (Address 0Eh) ........................................................................................ 45 7.11.1 Passthrough Analog ............................................................................................................ 45 7.11.2 Passthrough Mute ............................................................................................................... 45 7.11.3 Freeze Registers ................................................................................................................. 45 7.11.4 HP/Speaker De-Emphasis ..................................................................................................45 7.11.5 Digital Soft Ramp ................................................................................................................ 45 7.11.6 Digital Zero Cross ................................................................................................................ 46 7.12 Playback Control 2 (Address 0Fh) ............................................................................................... 46 7.12.1 Headphone Mute ................................................................................................................. 46 7.12.2 Speaker Mute ...................................................................................................................... 46 7.12.3 Speaker Volume Setting B=A ..............................................................................................46 7.12.4 Speaker Channel Swap ....................................................................................................... 46 7.12.5 Speaker MONO Control ...................................................................................................... 47 7.12.6 Speaker Mute 50/50 Control ............................................................................................... 47 7.13 Passthrough x Volume: PASSAVOL (Address 14h) & PASSBVOL (Address 15h) .................... 47 7.13.1 Passthrough x Volume ........................................................................................................ 47 7.14 PCMx Volume: PCMA (Address 1Ah) & PCMB (Address 1Bh) ................................................... 48 7.14.1 PCM Channel x Mute .......................................................................................................... 48 7.14.2 PCM Channel x Volume ...................................................................................................... 48 7.15 Beep Frequency & On Time (Address 1Ch) ................................................................................ 48 7.15.1 Beep Frequency .................................................................................................................. 48 7.15.2 Beep On Time ..................................................................................................................... 49 |
类似零件编号 - CDB43L22 |
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类似说明 - CDB43L22 |
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