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CS43L22 数据表(PDF) 6 Page - Cirrus Logic |
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CS43L22 数据表(HTML) 6 Page - Cirrus Logic |
6 / 68 page 6 DS792F1 CS43L22 Confidential Draft 10/7/08 11. DIGITAL FILTER PLOTS ................................................................................................................... 64 12. PARAMETER DEFINITIONS .............................................................................................................. 65 13. PACKAGE DIMENSIONS .................................................................................................................. 66 THERMAL CHARACTERISTICS ......................................................................................................... 66 14. ORDERING INFORMATION .............................................................................................................. 67 15. REFERENCES .................................................................................................................................... 67 16. REVISION HISTORY .......................................................................................................................... 67 LIST OF FIGURES Figure 1. Typical Connection Diagram ........................................................................................................ 9 Figure 2. Headphone Output Test Load .................................................................................................... 15 Figure 3. Serial Audio Interface Timing ..................................................................................................... 17 Figure 4. Control Port Timing - I²C ............................................................................................................ 18 Figure 5. DSP Engine Signal Flow ............................................................................................................ 22 Figure 6. Beep Configuration Options ....................................................................................................... 23 Figure 7. Peak Detect & Limiter ................................................................................................................ 24 Figure 8. Analog Passthrough Signal Flow ............................................................................................... 25 Figure 9. Analog Outputs .......................................................................................................................... 26 Figure 10. PWM Output Stage .................................................................................................................. 27 Figure 11. Battery Compensation ............................................................................................................. 29 Figure 12. I²S Format ................................................................................................................................ 31 Figure 13. Left-Justified Format ................................................................................................................ 31 Figure 14. Right-Justified Format\ ............................................................................................................. 31 Figure 15. DSP Mode Format) .................................................................................................................. 32 Figure 16. Control Port Timing, I²C Write .................................................................................................. 34 Figure 17. Control Port Timing, I²C Read .................................................................................................. 34 Figure 18. THD+N vs. Output Power per Channel at 1.8 V (16 Ω load) ................................................... 60 Figure 19. THD+N vs. Output Power per Channel at 2.5 V (16 Ω load) ................................................... 60 Figure 20. THD+N vs. Output Power per Channel at 1.8 V (32 Ω load) ................................................... 61 Figure 21. THD+N vs. Output Power per Channel at 2.5 V (32 Ω load) ................................................... 61 Figure 22. Passband Ripple ...................................................................................................................... 64 Figure 23. Stopband .................................................................................................................................. 64 Figure 24. DAC Transition Band ............................................................................................................... 64 Figure 25. Transition Band (Detail) ........................................................................................................... 64 |
类似零件编号 - CS43L22 |
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类似说明 - CS43L22 |
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