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PSMN1R7-30YL 数据表(PDF) 7 Page - NXP Semiconductors |
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PSMN1R7-30YL 数据表(HTML) 7 Page - NXP Semiconductors |
7 / 13 page ![]() PSMN1R7-30YL_1 © NXP B.V. 2008. All rights reserved. Preliminary data sheet Rev. 01 — 11 September 2008 7 of 13 NXP Semiconductors PSMN1R7-30YL N-channel TrenchMOS logic level FET Fig 9. Input and reverse transfer capacitances as a function of gate-source voltage; typical values Fig 10. Gate-source threshold voltage as a function of junction temperature Fig 11. Sub-threshold drain current as a function of gate-source voltage Fig 12. Drain-source on-state resistance as a function of gate-source voltage; typical values 003aac455 0 2000 4000 6000 8000 24 68 10 VGS (V) C (pF) Ciss Crss Tj (°C) -60 180 120 060 003aab272 1 2 3 0.5 1.5 VGS(th) (V) 0 max typ min 003aab271 10−4 10−5 10−3 ID (A) 10−6 VGS (V) 0 2.5 2 1 1.5 0.5 typ max min 003aac451 1.0 1.5 2.0 2.5 3.0 246 8 10 VGS (V) RDSon (m Ω) |
类似零件编号 - PSMN1R7-30YL |
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类似说明 - PSMN1R7-30YL |
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